Hello Alexey,
On 02.05.19 10:20, Alexey Borovikov wrote:
How to configure the board with soldered memory where spd? Is there any difference when using a memory controller with soldered memory with spd and DIMM?
this really depends on your board design. If the board with SPD follows the same layout as the board without, the SPD should probably only be used to configure the memory timings. In this case, you could write some code that reads the SPD and translates the settings for the memory-down configuration of FSP. Something like that has been done here [1], for instance.
However, if your board design follows the design of a real DIMM, I would simply try _not_ to treat it like a memory-down configuration and confi- gure FSP as if there were a DIMM.
Hope that helps, Nico
[1] https://review.coreboot.org/cgit/coreboot.git/tree/src/mainboard/siemens/mc_...
Hello Nico, thank! If I understand correctly, when setting up a FSP with memory down, FSP does not read the SPD, but waits for the setting as a function parameter. If I set memory as DIMM in the FSP, then the FSP will read the SPD from the specified SMBUS address (A0, A2). I'm right?
-----Исходное сообщение----- From: Nico Huber Sent: Thursday, May 02, 2019 5:18 PM To: Alexey Borovikov ; coreboot@coreboot.org Subject: Re: [coreboot] FSP 1.0: How to configure soldered memory with spd
Hello Alexey,
On 02.05.19 10:20, Alexey Borovikov wrote:
How to configure the board with soldered memory where spd? Is there any difference when using a memory controller with soldered memory with spd and DIMM?
this really depends on your board design. If the board with SPD follows the same layout as the board without, the SPD should probably only be used to configure the memory timings. In this case, you could write some code that reads the SPD and translates the settings for the memory-down configuration of FSP. Something like that has been done here [1], for instance.
However, if your board design follows the design of a real DIMM, I would simply try _not_ to treat it like a memory-down configuration and confi- gure FSP as if there were a DIMM.
Hope that helps, Nico
[1] https://review.coreboot.org/cgit/coreboot.git/tree/src/mainboard/siemens/mc_...
Hi Alexey,
Yes, Soldered Memory design needs FSP policies to be initialized with values appropriate for the Memory Device on the board. For SO-DIMM based memory design, it is expected that Memory Reference Code (MRC) inside FSP reads SPD via SMBUS from the DIMM itself. MRC inside FSP is designed this way for reason that Soldered Memory will not be replaced on a particular design, hence developer could hardcode parameters for that memory device. However for SODIMM, we could use DIMM from any vendor/configuration. Hence it needs to be dynamically determined.
Thanks, Shreesh Chhabbi
-----Original Message----- From: Alexey Borovikov realman.bau@gmail.com Sent: Thursday 2 May 2019 21:23 To: coreboot@coreboot.org; Nico Huber nico.h@gmx.de Subject: [coreboot] Re: FSP 1.0: How to configure soldered memory with spd
Hello Nico, thank! If I understand correctly, when setting up a FSP with memory down, FSP does not read the SPD, but waits for the setting as a function parameter. If I set memory as DIMM in the FSP, then the FSP will read the SPD from the specified SMBUS address (A0, A2). I'm right?
-----Исходное сообщение----- From: Nico Huber Sent: Thursday, May 02, 2019 5:18 PM To: Alexey Borovikov ; coreboot@coreboot.org Subject: Re: [coreboot] FSP 1.0: How to configure soldered memory with spd
Hello Alexey,
On 02.05.19 10:20, Alexey Borovikov wrote:
How to configure the board with soldered memory where spd? Is there any difference when using a memory controller with soldered memory with spd and DIMM?
this really depends on your board design. If the board with SPD follows the same layout as the board without, the SPD should probably only be used to configure the memory timings. In this case, you could write some code that reads the SPD and translates the settings for the memory-down configuration of FSP. Something like that has been done here [1], for instance.
However, if your board design follows the design of a real DIMM, I would simply try _not_ to treat it like a memory-down configuration and confi- gure FSP as if there were a DIMM.
Hope that helps, Nico
[1] https://review.coreboot.org/cgit/coreboot.git/tree/src/mainboard/siemens/mc_... _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
Hello Alexey,
On 02.05.19 22:22, Alexey Borovikov wrote:
If I understand correctly, when setting up a FSP with memory down, FSP does not read the SPD, but waits for the setting as a function parameter. If I set memory as DIMM in the FSP, then the FSP will read the SPD from the specified SMBUS address (A0, A2). I'm right?
yes, I would expect that. But documentation is thin and I've no experience with the BayTrail FSP in particular.
Nico
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Alexey Borovikov -
Nico Huber -
Shreesh Chhabbi