On Mon, Apr 17, 2017 at 1:40 AM Zoran Stojsavljevic < zoran.stojsavljevic@gmail.com> wrote:
As my best understanding is, INTEL FSP is nothing else, but stripped to the bones BIOS, with ONLY PEI phase in the charge (NOT the entire PEI, Platform init is selectively implemented in FSP). We have there CPU init, PCH init, and, at the very end. Platform init.
is that what's in minnowmax? I am a bit unsure.
Now, said that, I will ask the entire community the following questions: [1] What is the definition of Coreboot (in my naive vision, minimal/a must DXE + OS Boot Loader phase preparation - example: SeaBIOS payload)?
my question is not really about coreboot. I'm not using coreboot in this case. I'm hoping to gain from the expertise of this list.
[2] What does it mean in your interpretation: "single DXE"?
just that. I want a single DXE, which PEI starts, and the DXE never returns. In this case it will be a linux kernel.
[3] If you are talking about MinnowMax. I assume you are talking about ATOM BYT M/I skus, aren't you?
Is that what turbot is?
[4] Why, in the first place, INTEL FSP experts are NOT answering your quest, since they (I guess) better understand what you are asking for???
I don't know.
[5] What does it mean: "our own Tiano Core"? Does INTEL does NOT own Tiano Core? Or Coreboot (Google) created its own Tiano Core???
by 'our own tiano core' I simply mean a tiano core built from source.
ron
-
ron minnich