Tyan S2892 lspci

[Carl-Daniel Hailfinger]

Hi Myles,

could you please run
lspci -tvn
lspci -nnvvx
both under coreboot and proprietary BIOS on your S2892? We're trying to
figure out how to best represent the multiple link structure of that
board in our v3 dts.

Thanks!
Regards,
Carl-Daniel

[Myles Watson]

On Sat, Sep 6, 2008 at 5:25 PM, Carl-Daniel Hailfinger <
[e-mail]> wrote:
> Hi Myles,
>
> could you please run
> lspci -tvn
> lspci -nnvvx
> both under coreboot and proprietary BIOS on your S2892? We're trying to
> figure out how to best represent the multiple link structure of that
> board in our v3 dts.

Here's the output you requested.

disclaimers:
lspci is a different version
I don't have both CPU sockets populated with Opterons
I have an FPGA in the second socket
I have a PCIe SATA controller

Wouldn't the s2895 be more interesting since it has a PCIe controller that
is connected only if both Opterons are populated?

Thanks,
Myles
> Thanks!
> Regards,
> Carl-Daniel

[Carl-Daniel Hailfinger]

On 08.09.2008 18:02, Myles Watson wrote:
> On Sat, Sep 6, 2008 at 5:25 PM, Carl-Daniel Hailfinger <
> [e-mail]> wrote:
> > Hi Myles,
> >
> > could you please run
> > lspci -tvn
> > lspci -nnvvx
> > both under coreboot and proprietary BIOS on your S2892? We're trying to
> > figure out how to best represent the multiple link structure of that
> > board in our v3 dts.
>
> Here's the output you requested.

Thanks a lot! It is very educational and confirms my suspicions.
> disclaimers:
> lspci is a different version
> I don't have both CPU sockets populated with Opterons
> I have an FPGA in the second socket
> I have a PCIe SATA controller

Ah, that explains the peculiarities. Still, it is very valuable because
I can correlate it with my drawings of the device tree.
> Wouldn't the s2895 be more interesting since it has a PCIe controller that
> is connected only if both Opterons are populated?

If you have a s2895 with two Opterons, I'd be thankful for the same data.

Regards,
Carl-Daniel

[Myles Watson]

> If you have a s2895 with two Opterons, I'd be thankful for the same data.

These are only for the factory BIOS.  I don't have LinuxBIOS on it right
now.

Thanks,
Myles

[Carl-Daniel Hailfinger]

On 09.09.2008 17:29, Myles Watson wrote:
> > If you have a s2895 with two Opterons, I'd be thankful for the same data.
>
> These are only for the factory BIOS.  I don't have LinuxBIOS on it right
> now.

Thanks! It seems that your lspci version can't handle the -nn parameter
(the output looked like only -n was specified). Although the output was
a bit more difficult to read due to this, it provided valuable insights.
It seems coreboot sets up a completely different bus architecture
compared to factory BIOS.

As additional confusion there are PCI devices which are logically on one
bus, but at the same time they are not. An undirected device tree is
totally the wrong model for this bus/link graph. We may be able to
extend our v3 model to cope in a kludgy way, though.

Regards,
Carl-Daniel

[Vincent Legoll]

On Wed, Sep 10, 2008 at 5:00 AM, Carl-Daniel Hailfinger
 wrote:
> It seems coreboot sets up a completely different bus architecture
> compared to factory BIOS.

Yes I got bitten by this on my port, I was trying to replicate exactly
the same bus numbering scheme as factory BIOS and got bitten
by coreboot changing the way they were numbered between boots.
> As additional confusion there are PCI devices which are logically on one
> bus, but at the same time they are not. An undirected device tree is
> totally the wrong model for this bus/link graph. We may be able to
> extend our v3 model to cope in a kludgy way, though.

The HT "graph" that is on NUMA opterons dual and quad setups
would be a problem too, I think.