I am writing some code to fixup the video chipset trident cyberblade and V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am looking for information about the real bios process, and about the layout of the common bios files, and of course, any information about bios as possible.
My main problem is to find good documentation about the post, the boot process.
I read on some places which the CS is set F000 and EIP FFF0, so in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me.
I need some documentation about 20bits addressing lines, and the GATE A20 function also.
Tanks in advance.
On Sat, Mar 29, 2003 at 08:45:30AM +0000, Ivan Gustavo wrote:
I am writing some code to fixup the video chipset trident
cyberblade and V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so
I will really appreciate that work.
I read on some places which the CS is set F000 and EIP FFF0, so
in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me.
CPU starts with last 16 byte of address space. On a 386 or later it's FFFFFFF:0000?? Anyway that does not really matter since the code there is a simple long jump (jmp seg:off).
On Fri, 28 Mar 2003, SONE Takeshi wrote:
CPU starts with last 16 byte of address space. On a 386 or later it's FFFFFFF:0000??
CPU starts out in "big real mode" at 0xffff0000, and most BIOSes (linuxbios too) do a jump cs:ip to 0xf000:0x0, which pops the CPU into the old 8086 real mode.
kron
ron minnich wrote:
On Fri, 28 Mar 2003, SONE Takeshi wrote:
CPU starts with last 16 byte of address space. On a 386 or later it's FFFFFFF:0000??
CPU starts out in "big real mode" at 0xffff0000,
Tanks :)
But, other ask... Ok , the CS point to the last accessible segment, and IP to the last addess less 16 bytes... What I do not understand is, how the bios data go to there (may be funny to you, so I dont find nothing documentation about)... I ask it because a common bios have 256k and the segment which the processor point is 752Kbytes far... ... so I guess I am not imagining right.
and most BIOSes (linuxbios too) do a jump cs:ip to 0xf000:0x0, which
pops the CPU into the
old 8086 real mode.
kron
* SONE Takeshi ts1@cma.co.jp [030328 14:49]:
On Sat, Mar 29, 2003 at 08:45:30AM +0000, Ivan Gustavo wrote:
I read on some places which the CS is set F000 and EIP FFF0, so
in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me.
CPU starts with last 16 byte of address space. On a 386 or later it's FFFFFFF:0000?? Anyway that does not really matter since the code there is a simple long jump (jmp seg:off).
Even i386+ CPUs come up in 16bit mode, so it is F000:FFF0 (setting the 64k segment to F0000-FFFFF and having the entry point 16 bytes before the end of this segment
Stefan
Best regards, Stefan Reinauer
Ivan Gustavo ivan@munix.com.br writes:
I am writing some code to fixup the video chipset trident cyberblade and
V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am looking for information about the real bios process, and about the layout of the common bios files, and of course, any information about bios as possible.
You might try the IDE_BOOT option of etherboot...
My main problem is to find good documentation about the post, the boot process.
I read on some places which the CS is set F000 and EIP FFF0, so in other
websites I had seen CS is FFF0, in other 000F , causing some confusion with me.
So far I have not seen a good reply so:
Since there continues to be confusion. The cpu starts running at: 0xffff0000:0xfff0 An impossible to load CS selector but the cpu manages it.
Many times there is a far jmp to 0xf000:???? so there is a rom alias there.
While not universally used in LinuxBIOS there is code present to do a short backwards jump. And at the location of that jump transition into 32bit protected mode.
I need some documentation about 20bits addressing lines, and the GATE A20 function also.
As far as gateA20. It is for legacy compatibility and it has been since the introduction of the 286. When a machine boots up all address lines are enabled and active. When going into dos compatibility mode gate a20 is disabled.
Under LinuxBIOS gateA20 is always left enabled.
Eric