Hello!
I'm experimenting with alix.2c3 here, but have no luck. I tried coreboot v3 (r870, r898) with filo (r64, r80) and coreinfo (r3640) payloads (with libpayload r3640). All ends up with following:
last n-lines snippet (can do full log if it's needed) ....... Wrote coreboot table at: 0x00000500 - 0x00000bbc checksum 50f0 Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 1 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 apic_0(APIC: 00): enabled 1 have_resources 1 initialized 1 domain_0_pci_1_0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_0(PCI: 00:0f.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_2(PCI: 00:0f.2): enabled 1 have_resources 1 initialized 1 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.2(PCI: 00:01.2): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:09.0(PCI: 00:09.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0a.0(PCI: 00:0a.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0b.0(PCI: 00:0b.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.3(PCI: 00:0f.3): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.4(PCI: 00:0f.4): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.5(PCI: 00:0f.5): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.6(PCI: 00:0f.6): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.7(PCI: 00:0f.7): enabled 1 have_resources 1 initialized 1 Stage2 code done. LAR: Attempting to open 'normal/payload'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 30700 LAR: seen member normal/stage2/segment2@0xfff89550, size 841 LAR: seen member normal/payload/segment0@0xfff898f0, size 1 LAR: seen member normal/payload/segment1@0xfff89950, size 15072 LAR: seen member blob/vsa@0xfff8d480, size 30374 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 30700 LAR: seen member normal/stage2/segment2@0xfff89550, size 841 LAR: seen member normal/payload/segment0@0xfff898f0, size 1 LAR: CHECK normal/payload/segment0 @ 0xfff898f0 start 0xfff89940 len 1 reallen 183984 compression 3 entry 0x00101998 loadaddress 0x00109300 LAR: Compression algorithm #3 (zeroes) used LAR: Attempting to open 'normal/payload/segment1'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 30700 LAR: seen member normal/stage2/segment2@0xfff89550, size 841 LAR: seen member normal/payload/segment0@0xfff898f0, size 1 LAR: seen member normal/payload/segment1@0xfff89950, size 15072 LAR: CHECK normal/payload/segment1 @ 0xfff89950 start 0xfff899a0 len 15072 reallen 37632 compression 1 entry 0x00101998 loadaddress 0x00100000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/payload/segment2'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 30700 LAR: seen member normal/stage2/segment2@0xfff89550, size 841 LAR: seen member normal/payload/segment0@0xfff898f0, size 1 LAR: seen member normal/payload/segment1@0xfff89950, size 15072 LAR: seen member blob/vsa@0xfff8d480, size 30374 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: load_file: No such file 'normal/payload/segment2' LAR: load_file_segments: All loaded, entry 0x00101998 ========== mainboard_pre_payload: done =========================================
and that's all, no matter what I tried, it just stops there Post code at this moment is 96, as per coreboot post_code.h this is:
#define POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE 0x96
Don't know what this actually means. Did anybody have this kind of problem? Is there any know-how to make it work? Or does it actually work at all?
Regards, Roman
Hi Roman,
Mail Lists wrote:
I'm experimenting with alix.2c3 here, but have no luck. I tried coreboot v3 (r870, r898) with filo (r64, r80) and coreinfo (r3640) payloads (with libpayload r3640). All ends up with following:
last n-lines snippet (can do full log if it's needed)
Please do send the full log.
LAR: File not found! LAR: load_file: No such file 'normal/payload/segment2'
This can look ominous but v3 does not know how many segments there are in the payload and will try to load them in order until one can't be found.
#define POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE 0x96
Don't know what this actually means.
coreboot seems to stop in the middle of writing tables to RAM.
Did anybody have this kind of problem?
I haven't seen this particular problem before.
Is there any know-how to make it work? Or does it actually work at all?
I successfully use v3 on alix1c and several others have used at least some version on 2c boards.
How are you building coreboot?
If you're not using buildrom, you need some LAR know-how because the v3 build process is a bit broken in that it does not include the VSA into the resulting larball (coreboot.rom) automatically. The magic command is:
lar -C lzma -a build/coreboot.rom amd_vsa_lx_1.01.bin:blob/vsa
amd_vsa_lx_1.01.bin needs to be 57504 bytes, if it is smaller you need to uncompress it. Downloading http://www.amd.com/files/connectivitysolutions/geode/geode_lx/amd_vsa_lx_1.0... and renaming it to exclude the .gz extension produces the correct file here.
$ md5sum amd_vsa_lx_1.01.bin 0f4fd87b3eef78bd90b56a39646f5845 amd_vsa_lx_1.01.bin
It seems AMD's web server is decompressing .gz files before they are sent to the client, without changing the filename.
//Peter
On Wednesday 08 October 2008 02:16:44 Peter Stuge wrote:
Hi Roman,
Mail Lists wrote:
I'm experimenting with alix.2c3 here, but have no luck. I tried coreboot v3 (r870, r898) with filo (r64, r80) and coreinfo (r3640) payloads (with libpayload r3640). All ends up with following:
last n-lines snippet (can do full log if it's needed)
Please do send the full log.
ok, will do as soon as I will get to my alix
How are you building coreboot?
build payload get coreboot from svn make menuconfig include payload make
but seems like I need to try buildrom also... but anyway... I think it should work like this also, isn't it?
If you're not using buildrom, you need some LAR know-how because the v3 build process is a bit broken in that it does not include the VSA into the resulting larball (coreboot.rom) automatically. The magic command is:
lar -C lzma -a build/coreboot.rom amd_vsa_lx_1.01.bin:blob/vsa
of cause I did that I also tried not to include vsa but it ends up complaining about not finding vsa :)
amd_vsa_lx_1.01.bin needs to be 57504 bytes, if it is smaller you need to uncompress it. Downloading http://www.amd.com/files/connectivitysolutions/geode/geode_lx/amd_vsa_lx_1. 01.bin.gz and renaming it to exclude the .gz extension produces the correct file here. $ md5sum amd_vsa_lx_1.01.bin 0f4fd87b3eef78bd90b56a39646f5845 amd_vsa_lx_1.01.bin
exactly: 0f4fd87b3eef78bd90b56a39646f5845 amd_vsa_lx_1.01.bin
Regards, Roman
Roman Yeryomin wrote:
How are you building coreboot?
build payload get coreboot from svn make menuconfig include payload make
but seems like I need to try buildrom also... but anyway... I think it should work like this also, isn't it?
Yes, I definately agree with you. The v3 build system still has bugs.
lar -C lzma -a build/coreboot.rom amd_vsa_lx_1.01.bin:blob/vsa
of cause I did that
Perfect. I hope those logs can tell us more.
//Peter
On Wed, Oct 8, 2008 at 5:12 PM, Peter Stuge peter@stuge.se wrote:
Perfect. I hope those logs can tell us more.
ok, here they come... flashing process seems to be ok:
flashrom -vw bios.bin Calibrating delay loop... OK. No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. Found chip "AMIC A49LF040A" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Programming page: 0007 at address: 0x00070000 Verifying flash... VERIFIED.
full boot log in attachment, hope it helps
On Wed, Oct 8, 2008 at 5:12 PM, Peter Stuge peter@stuge.se wrote:
Roman Yeryomin wrote:
but seems like I need to try buildrom also...
same behaviour with buildrom see attached log
Roman Yeryomin wrote:
same behaviour with buildrom
Looks pretty good. Give me a few minutes, I'll compare with my 1c.
//Peter
Roman Yeryomin wrote:
Stage2 code done.
..
LAR: load_file: No such file 'normal/payload/segment2' LAR: load_file_segments: All loaded, entry 0x00101968 ========== mainboard_pre_payload: done =========================================
--8<-- end of my log with ELF loader Stage2 code done. LAR: Attempting to open 'normal/payload'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload@0xfffedae0, size 16651 LAR: CHECK normal/payload @ 0xfffedae0 start 0xfffedb20 len 16651 reallen 28892 compression 1 entry 0x00000000 loadaddress 0x00000000 LAR: Attempting to open 'normal/payload'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload@0xfffedae0, size 16651 LAR: CHECK normal/payload @ 0xfffedae0 start 0xfffedb20 len 16651 reallen 28892 compression 1 entry 0x00000000 loadaddress 0x00000000 LAR: Compression algorithm #1 (lzma) used ELF loader started. Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 5 phdr load_elf_segments: header 0x00400000 #headers 5 New segment addr 0x100000 size 0x24f10 offset 0xe0 filesize 0x6e0c Copy to 0x00100000 from 0x004000e0 for 28172 bytes Set 0x00100000 to 0 for 123140 bytes New segment addr 0x124f10 size 0x48 offset 0x6eec filesize 0x48 Copy to 0x00124f10 from 0x00406eec for 72 bytes Dropping non PT_LOAD segment Dropping non PT_LOAD segment Dropping non PT_LOAD segment Loaded segments Jumping to boot code at 0x00104de8 FILO version 0.5.5 (stuge@n410c) Sun Jun 22 03:45:51 CEST 2008 boot: hda1:/boot/bzImage-2.6.25 root=/dev/sda1 console=tty0 console=ttyS0,115200 pata_cs5536.msr=1 -->8--
I don't see the "mainboard_pre_payload" message at all, even though it is in alix1c/stage1.c just like alix2c3/stage1.c.
--8<-- end of my log using a preparsed payload, lar -e Stage2 code done. LAR: Attempting to open 'normal/payload'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload/segment0@0xfffedae0, size 1 LAR: seen member normal/payload/segment1@0xfffedb40, size 16417 LAR: seen member normal/payload/segment2@0xffff1bc0, size 47 LAR: seen member zerofill@0xffff1c40, size 37695 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload/segment0@0xfffedae0, size 1 LAR: CHECK normal/payload/segment0 @ 0xfffedae0 start 0xfffedb30 len 1 reallen 123136 compression 3 entry 0x00104de8 loadaddress 0x00106e10 LAR: Compression algorithm #3 (zeroes) used LAR: Attempting to open 'normal/payload/segment1'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload/segment0@0xfffedae0, size 1 LAR: seen member normal/payload/segment1@0xfffedb40, size 16417 LAR: CHECK normal/payload/segment1 @ 0xfffedb40 start 0xfffedb90 len 16417 reallen 28172 compression 1 entry 0x00104de8 loadaddress 0x00100000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/payload/segment2'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload/segment0@0xfffedae0, size 1 LAR: seen member normal/payload/segment1@0xfffedb40, size 16417 LAR: seen member normal/payload/segment2@0xffff1bc0, size 47 LAR: CHECK normal/payload/segment2 @ 0xffff1bc0 start 0xffff1c10 len 47 reallen 72 compression 1 entry 0x00104de8 loadaddress 0x00124f10 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/payload/segment3'. LAR: Start 0xfffe0000 len 0x20000 LAR: seen member normal/option_table@0xfffe0000, size 1200 LAR: seen member normal/initram/segment0@0xfffe0500, size 5984 LAR: seen member normal/stage2/segment0@0xfffe1cb0, size 1 LAR: seen member normal/stage2/segment1@0xfffe1d10, size 17410 LAR: seen member normal/stage2/segment2@0xfffe6170, size 552 LAR: seen member blob/vsa@0xfffe63f0, size 30374 LAR: seen member normal/payload/segment0@0xfffedae0, size 1 LAR: seen member normal/payload/segment1@0xfffedb40, size 16417 LAR: seen member normal/payload/segment2@0xffff1bc0, size 47 LAR: seen member zerofill@0xffff1c40, size 37695 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: load_file: No such file 'normal/payload/segment3' LAR: load_file_segments: All loaded, entry 0x00104de8 ========== mainboard_pre_payload: done ========================================= FILO version 0.5.5 (stuge@n410c) Sun Jun 22 03:45:51 CEST 2008 boot: hda1:/boot/bzImage-2.6.25 root=/dev/sda1 console=tty0 console=ttyS0,115200 pata_cs5536.msr=1 -->8--
You could try first without preparsing the payload, and then try a few different payloads. What are you currently using?
//Peter
On Thu, Oct 9, 2008 at 12:11 AM, Peter Stuge peter@stuge.se wrote:
I don't see the "mainboard_pre_payload" message at all, even though it is in alix1c/stage1.c just like alix2c3/stage1.c.
so why is it appearing at all?
You could try first without preparsing the payload, and then try a few different payloads. What are you currently using?
already tried not to preparse payload, with coreboot-v3 svn it gives the same "mainboard_pre_payload" message , just tried with buildrom:
Wrote coreboot table at: 0x00000500 - 0x00000bbc checksum 3fe7 Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 1 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 apic_0(APIC: 00): enabled 1 have_resources 1 initialized 1 domain_0_pci_1_0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_0(PCI: 00:0f.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_2(PCI: 00:0f.2): enabled 1 have_resources 1 initialized 1 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.2(PCI: 00:01.2): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:09.0(PCI: 00:09.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0a.0(PCI: 00:0a.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0b.0(PCI: 00:0b.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.3(PCI: 00:0f.3): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.4(PCI: 00:0f.4): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.5(PCI: 00:0f.5): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.6(PCI: 00:0f.6): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.7(PCI: 00:0f.7): enabled 1 have_resources 1 initialized 1 Stage2 code done. LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 18500 LAR: seen member normal/stage2/segment2@0xfff865b0, size 403 LAR: seen member normal/payload@0xfff867a0, size 17963 LAR: seen member blob/vsa@0xfff8ae10, size 30374 LAR: seen member zerofill@0xfff92500, size 428671 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: load_file: No such file 'normal/payload/segment0' LAR: load_file_segments: Failed for normal/payload FATAL: No usable payload found.
tried with coreinfo and filo payloads (both buildrom and clean svn)
what versions/revisions people with working alix.2c3 use?
Roman
Roman Yeryomin wrote:
I don't see the "mainboard_pre_payload" message at all, even though it is in alix1c/stage1.c just like alix2c3/stage1.c.
so why is it appearing at all?
I would expect it to always appear. I think it's a bug that it doesn't appear for me when using the ELF loader.
You could try first without preparsing the payload, and then try a few different payloads. What are you currently using?
already tried not to preparse payload, with coreboot-v3 svn it gives the same "mainboard_pre_payload" message
That does not match my results. Hmm.
, just tried with buildrom:
LAR: load_file: No such file 'normal/payload/segment0' LAR: load_file_segments: Failed for normal/payload FATAL: No usable payload found.
This is not using the ELF loader, this is trying to load a preparsed payload.
tried with coreinfo and filo payloads (both buildrom and clean svn)
what versions/revisions people with working alix.2c3 use?
I'm using FILO r49 or r52 and v3 r909.
Maybe you can try building v3 with the ELF loader enabled and a few different payloads without using preparsing?
//Peter
On Thursday 09 October 2008 16:46:00 Peter Stuge wrote:
what versions/revisions people with working alix.2c3 use?
I'm using FILO r49 or r52 and v3 r909.
Maybe you can try building v3 with the ELF loader enabled and a few different payloads without using preparsing?
ok, I will try again from scratch few hours later and let you know
On Thu, Oct 9, 2008 at 1:25 AM, Roman Yeryomin leroi.lists@gmail.com wrote:
LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/option_table@0xfff80000, size 1200 LAR: seen member normal/initram/segment0@0xfff80500, size 5976 LAR: seen member normal/stage2/segment0@0xfff81cb0, size 1 LAR: seen member normal/stage2/segment1@0xfff81d10, size 18500 LAR: seen member normal/stage2/segment2@0xfff865b0, size 403 LAR: seen member normal/payload@0xfff867a0, size 17963 LAR: seen member blob/vsa@0xfff8ae10, size 30374 LAR: seen member zerofill@0xfff92500, size 428671 LAR: seen member bootblock@0xffffafc0, size 20480 LAR: File not found! LAR: load_file: No such file 'normal/payload/segment0' LAR: load_file_segments: Failed for normal/payload FATAL: No usable payload found.
your build is misconfigured somehow.
You are loading an ELF payload and ELF is not built in as part of your build.
2 suggestions: get an image from someone else that is "known good", and burn and test it. That will verify hardware. Second, send us your v3 config file. Something is wrong with your build.
ron
On Thu, Oct 09, 2008 at 07:33:23AM -0700, ron minnich wrote:
your build is misconfigured somehow.
You are loading an ELF payload and ELF is not built in as part of your build.
2 suggestions: get an image from someone else that is "known good", and burn and test it.
I can help with that. I'll send you an image in a separate message Roman.
Thanks, Ward.
On Thursday 09 October 2008 17:51:01 Ward Vandewege wrote:
On Thu, Oct 09, 2008 at 07:33:23AM -0700, ron minnich wrote:
your build is misconfigured somehow.
You are loading an ELF payload and ELF is not built in as part of your build.
2 suggestions: get an image from someone else that is "known good", and burn and test it.
I can help with that. I'll send you an image in a separate message Roman.
cool got it will test after a while
On Thu, Oct 9, 2008 at 6:14 PM, Roman Yeryomin leroi.lists@gmail.com wrote:
On Thursday 09 October 2008 17:51:01 Ward Vandewege wrote:
On Thu, Oct 09, 2008 at 07:33:23AM -0700, ron minnich wrote:
your build is misconfigured somehow.
You are loading an ELF payload and ELF is not built in as part of your build.
2 suggestions: get an image from someone else that is "known good", and burn and test it.
I can help with that. I'll send you an image in a separate message Roman.
cool got it will test after a while
Well.. it works! btw, with filo already loaded it shows post code 96 anyway!
Roman Yeryomin wrote:
Well.. it works!
Ok. I believe your problem is with the payload. If you have a chance, try with the ELF loader and adding an ELF payload without lar -e.
Then, try reconfiguring without the ELF loader and add payload with lar -e.
Please note that the v3 build system does not neccessarily handle dependencies correctly yet, so it is always best to rm -rf build or make distclean when changing configuration.
btw, with filo already loaded it shows post code 96 anyway!
The payloads probably don't output any new codes.
//Peter
On Thu, Oct 09, 2008 at 07:05:23PM +0300, Roman Yeryomin wrote:
On Thu, Oct 9, 2008 at 6:14 PM, Roman Yeryomin leroi.lists@gmail.com wrote:
On Thursday 09 October 2008 17:51:01 Ward Vandewege wrote:
On Thu, Oct 09, 2008 at 07:33:23AM -0700, ron minnich wrote:
your build is misconfigured somehow.
You are loading an ELF payload and ELF is not built in as part of your build.
2 suggestions: get an image from someone else that is "known good", and burn and test it.
I can help with that. I'll send you an image in a separate message Roman.
cool got it will test after a while
Well.. it works!
Great.
So, as Peter said, payload problems. There is one thing to make sure; if you use a filo or etherboot payload, you should disable lzma compression (it does not work for those payloads).
Thanks, Ward.
Ward Vandewege wrote:
There is one thing to make sure; if you use a filo or etherboot payload, you should disable lzma compression (it does not work for those payloads).
My FILO works when lzma compressed, preparsed or not;
$ lar l build/bios.bin normal/option_table (1200 bytes @0x50);loadaddress 0x0 entry 0x0 normal/initram/segment0 (5984 bytes @0x550);loadaddress 0x0 entry 0x0x101d normal/stage2/segment0 (194748 bytes, zeroes compressed to 1 bytes @0x1d00);loadaddress 0x0xbe30 entry 0x0x2000 normal/stage2/segment1 (32623 bytes, lzma compressed to 17410 bytes @0x1d60);loadaddress 0x0x2000 entry 0x0x2000 normal/stage2/segment2 (7728 bytes, lzma compressed to 552 bytes @0x61c0);loadaddress 0x0xa000 entry 0x0x2000 blob/vsa (57504 bytes, lzma compressed to 30374 bytes @0x6430);loadaddress 0x0 entry 0x0 normal/payload/segment0 (123136 bytes, zeroes compressed to 1 bytes @0xdb30);loadaddress 0x0x106e10 entry 0x0x104de8 normal/payload/segment1 (28172 bytes, lzma compressed to 16417 bytes @0xdb90);loadaddress 0x0x100000 entry 0x0x104de8 normal/payload/segment2 (72 bytes, lzma compressed to 47 bytes @0x11c10);loadaddress 0x0x124f10 entry 0x0x104de8 zerofill (37695 bytes @0x11c80);loadaddress 0x0 entry 0x0 bootblock (20480 bytes @0x1b000) Total size = 130977B 127KB (0x1ffa1)
//Peter
On Thu, Oct 09, 2008 at 07:27:30PM +0200, Peter Stuge wrote:
Ward Vandewege wrote:
There is one thing to make sure; if you use a filo or etherboot payload, you should disable lzma compression (it does not work for those payloads).
My FILO works when lzma compressed, preparsed or not;
$ lar l build/bios.bin normal/option_table (1200 bytes @0x50);loadaddress 0x0 entry 0x0 normal/initram/segment0 (5984 bytes @0x550);loadaddress 0x0 entry 0x0x101d normal/stage2/segment0 (194748 bytes, zeroes compressed to 1 bytes @0x1d00);loadaddress 0x0xbe30 entry 0x0x2000 normal/stage2/segment1 (32623 bytes, lzma compressed to 17410 bytes @0x1d60);loadaddress 0x0x2000 entry 0x0x2000 normal/stage2/segment2 (7728 bytes, lzma compressed to 552 bytes @0x61c0);loadaddress 0x0xa000 entry 0x0x2000 blob/vsa (57504 bytes, lzma compressed to 30374 bytes @0x6430);loadaddress 0x0 entry 0x0 normal/payload/segment0 (123136 bytes, zeroes compressed to 1 bytes @0xdb30);loadaddress 0x0x106e10 entry 0x0x104de8 normal/payload/segment1 (28172 bytes, lzma compressed to 16417 bytes @0xdb90);loadaddress 0x0x100000 entry 0x0x104de8 normal/payload/segment2 (72 bytes, lzma compressed to 47 bytes @0x11c10);loadaddress 0x0x124f10 entry 0x0x104de8 zerofill (37695 bytes @0x11c80);loadaddress 0x0 entry 0x0 bootblock (20480 bytes @0x1b000) Total size = 130977B 127KB (0x1ffa1)
That's good. It definitely does not work in v2 though.
Thanks, Ward.
On Thu, Oct 9, 2008 at 8:27 PM, Peter Stuge peter@stuge.se wrote:
Ward Vandewege wrote:
There is one thing to make sure; if you use a filo or etherboot payload, you should disable lzma compression (it does not work for those payloads).
My FILO works when lzma compressed, preparsed or not;
finally I got it working! versions/revisions I use: libpayload r3640, filo r80, coreboot r912 didn't try compression yet but it works for me ONLY with preparsed payload (and adding it manually, not within coreboot build system)
./build/util/lar/lar -l bios.bin normal/option_table (1200 bytes @0x50);loadaddress 0x0 entry 0x0 normal/initram/segment0 (5976 bytes @0x550);loadaddress 0x0 entry 0x0x1015 normal/stage2/segment0 (194760 bytes, zeroes compressed to 1 bytes @0x1d00);loadaddress 0x0xd014 entry 0x0x2000 normal/stage2/segment1 (34752 bytes @0x1d60);loadaddress 0x0x2000 entry 0x0x2000 normal/stage2/segment2 (6228 bytes @0xa570);loadaddress 0x0xb7c0 entry 0x0x2000 normal/payload/segment0 (3514056 bytes, zeroes compressed to 1 bytes @0xbe20);loadaddress 0x0x1096a8 entry 0x0x10007c normal/payload/segment1 (38568 bytes @0xbe80);loadaddress 0x0x100000 entry 0x0x10007c normal/payload/segment2 (72 bytes @0x15580);loadaddress 0x0x463570 entry 0x0x10007c blob/vsa (57504 bytes @0x15610);loadaddress 0x0 entry 0x0 bootblock (20480 bytes @0x7b000) Total size = 165534B 161KB (0x2869e)
comparing to your image I don't have zerofill, does this matter?
one more issue I've noticed: kernel boots fine and seems to work ok but I don't have serial console anymore.. :( do you have it working on your alix? what could be the problem?
Roman
On Thu, Oct 9, 2008 at 12:11 PM, Roman Yeryomin leroi.lists@gmail.com wrote:
./build/util/lar/lar -l bios.bin normal/option_table (1200 bytes @0x50);loadaddress 0x0 entry 0x0 normal/initram/segment0 (5976 bytes @0x550);loadaddress 0x0 entry 0x0x1015 normal/stage2/segment0 (194760 bytes, zeroes compressed to 1 bytes @0x1d00);loadaddress 0x0xd014 entry 0x0x2000 normal/stage2/segment1 (34752 bytes @0x1d60);loadaddress 0x0x2000 entry 0x0x2000 normal/stage2/segment2 (6228 bytes @0xa570);loadaddress 0x0xb7c0 entry 0x0x2000 normal/payload/segment0 (3514056 bytes, zeroes compressed to 1 bytes @0xbe20);loadaddress 0x0x1096a8 entry 0x0x10007c normal/payload/segment1 (38568 bytes @0xbe80);loadaddress 0x0x100000 entry 0x0x10007c normal/payload/segment2 (72 bytes @0x15580);loadaddress 0x0x463570 entry 0x0x10007c blob/vsa (57504 bytes @0x15610);loadaddress 0x0 entry 0x0 bootblock (20480 bytes @0x7b000) Total size = 165534B 161KB (0x2869e)
comparing to your image I don't have zerofill, does this matter?
one more issue I've noticed: kernel boots fine and seems to work ok but I don't have serial console anymore.. :( do you have it working on your alix? what could be the problem?
zerofill is needed for speed but not correctness.
so you are saying a make in coreboot-v3 doesn't correctly set up the payload?
ron
ron minnich wrote:
so you are saying a make in coreboot-v3 doesn't correctly set up the payload?
Neither VSA nor payload. Never has for me.
//Peter
On Thu, Oct 9, 2008 at 12:30 PM, Peter Stuge peter@stuge.se wrote:
ron minnich wrote:
so you are saying a make in coreboot-v3 doesn't correctly set up the payload?
Neither VSA nor payload. Never has for me.
I understand VSA but every platform I build for includes the payload just fine. This is weird. Are you including the ELF parser in coreboot or are you doing pre-parsing?
ron
On Thu, Oct 9, 2008 at 10:30 PM, Peter Stuge peter@stuge.se wrote:
ron minnich wrote:
so you are saying a make in coreboot-v3 doesn't correctly set up the payload?
Neither VSA nor payload. Never has for me.
well, yes it adds payload (preparsed or not) but it simply doesn't work... at least for me
Roman Yeryomin wrote:
finally I got it working!
Great!
versions/revisions I use: libpayload r3640, filo r80, coreboot r912 didn't try compression yet but it works for me ONLY with preparsed payload (and adding it manually, not within coreboot build system)
Hm, ok. Yes, the build system doesn't include either VSA or payload. I'd love to get that fixed.
./build/util/lar/lar -l bios.bin Total size = 165534B 161KB (0x2869e)
comparing to your image I don't have zerofill, does this matter?
Only for boot speed. zerofill is used to "finalize" the larball so that scanning it's contents is as fast as possible. Without it, coreboot spends a lot of time during boot searching for files in unprogrammed flash memory.
one more issue I've noticed: kernel boots fine and seems to work ok but I don't have serial console anymore.. :( do you have it working on your alix?
Yes, works well on the 1c.
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
//Peter
On Thu, Oct 9, 2008 at 12:29 PM, Peter Stuge peter@stuge.se wrote:
Hm, ok. Yes, the build system doesn't include either VSA or payload. I'd love to get that fixed.
build system includes payload.
Heres' my dbe62 script:
#!/bin/bash
cp build/bios.bin /tmp/d.bin
lar -a /tmp/d.bin amd_vsa_lx_1.01.bin:blob/vsa
lar z /tmp/d.bin
lar l /tmp/d.bin
here's the relevant bits of .config I use:
# Payload
#
# CONFIG_PAYLOAD_ELF_LOADER is not set
CONFIG_PAYLOAD_ELF=y
# CONFIG_PAYLOAD_NONE is not set
CONFIG_PAYLOAD_FILE="../eb-5.4.3-via-velocity.elf"
# CONFIG_ZERO_AFTER_PAYLOAD is not set
the coreboot v3 build includes the payload just fine.
we made a decision on this list to NOT have coreboot v3 build include the VSA -- that's what buildrom is supposed to be for.
thanks
ron
ron minnich wrote:
build system includes payload.
CONFIG_PAYLOAD_ELF=y CONFIG_PAYLOAD_FILE="../eb-5.4.3-via-velocity.elf"
the coreboot v3 build includes the payload just fine.
Great! Then the problem must be the path in my (and Roman's) setup.
we made a decision on this list to NOT have coreboot v3 build include the VSA -- that's what buildrom is supposed to be for.
Should we reconsider?
//Peter
On Thu, Oct 9, 2008 at 10:29 PM, Peter Stuge peter@stuge.se wrote:
one more issue I've noticed: kernel boots fine and seems to work ok but I don't have serial console anymore.. :( do you have it working on your alix?
Yes, works well on the 1c.
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
Sorry didn't understand what you actually mean here... that I have fried my hardware?
Roman Yeryomin wrote:
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
Sorry didn't understand what you actually mean here... that I have fried my hardware?
Sorry! No not at all!
The serial port on alix1c is on the Winbond superio chip. The alix2 and 3 boards do not have this superio chip and their serial port is connected directly to the 5536 - and this is probably the reason that serial doesn't work anymore.
The 5536 port shall of course work too, but the Winbond chip is much more common.
I only meant that I haven't spent any time on my 3c3 board since I fried it.
Sorry for the confusion!
//Peter
On Thu, Oct 09, 2008 at 10:20:29PM +0200, Peter Stuge wrote:
Roman Yeryomin wrote:
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
Sorry didn't understand what you actually mean here... that I have fried my hardware?
Sorry! No not at all!
The serial port on alix1c is on the Winbond superio chip. The alix2 and 3 boards do not have this superio chip and their serial port is connected directly to the 5536 - and this is probably the reason that serial doesn't work anymore.
I don't understand - serial works fine for me on the 2c3. Getting serial to work was in fact the 'hardest' part of doing the 2c3 port based on the .1c code, because of the absense of the winbond superio chip. It required all of changing a few lines of code :)
Thanks, Ward.
On Thu, Oct 9, 2008 at 11:20 PM, Peter Stuge peter@stuge.se wrote:
Roman Yeryomin wrote:
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
Sorry didn't understand what you actually mean here... that I have fried my hardware?
Sorry! No not at all!
The serial port on alix1c is on the Winbond superio chip. The alix2 and 3 boards do not have this superio chip and their serial port is connected directly to the 5536 - and this is probably the reason that serial doesn't work anymore.
that's interesting.. but seems like kernel correctly detects ttyS0 and spits it's messages to it
.... console [tty0] enabled console [ttyS0] enabled .... Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a NS16550A ....
but after init starts it doesn't work anymore :( devise is present: ls -la /dev/ttyS0 crw-rw-rw- 1 root root 4, 64 Oct 9 21:06 /dev/ttyS0
any clue how I can get it working?
The 5536 port shall of course work too, but the Winbond chip is much more common.
I only meant that I haven't spent any time on my 3c3 board since I fried it.
hmm.. sad..
Sorry for the confusion!
that's ok I sometimes do not understand english quite well ;) I've checked with native bios -- works fine
Roman
On Fri, Oct 10, 2008 at 12:10 AM, Roman Yeryomin leroi.lists@gmail.com wrote:
On Thu, Oct 9, 2008 at 11:20 PM, Peter Stuge peter@stuge.se wrote:
Roman Yeryomin wrote:
what could be the problem?
My 1c has the serial port on a superio chip. I recognize this problem from other boards. I also have a 3c3 where I saw this before I fried the 5536 ATA driver.
Sorry didn't understand what you actually mean here... that I have fried my hardware?
The serial port on alix1c is on the Winbond superio chip. The alix2 and 3 boards do not have this superio chip and their serial port is connected directly to the 5536 - and this is probably the reason that serial doesn't work anymore.
that's interesting.. but seems like kernel correctly detects ttyS0 and spits it's messages to it
.... console [tty0] enabled console [ttyS0] enabled .... Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a NS16550A ....
but after init starts it doesn't work anymore :( devise is present: ls -la /dev/ttyS0 crw-rw-rw- 1 root root 4, 64 Oct 9 21:06 /dev/ttyS0
any clue how I can get it working?
What coreboot have (or does not have) so that serial console in linux (busybox particularly) stops working? Or is it busybox's fault? (don't think so as it works with native bios)
Roman
can you build filo to ONLY use serial port and let us know how that goes?
ron
On Wednesday 08 October 2008 02:22:49 ron minnich wrote:
can you build filo to ONLY use serial port and let us know how that goes?
how do I do that? maybe you mean libpayload?
my config (r64) is:
CONFIG_TARGET_I386=y # CONFIG_REVIEW is not set
# # Interface Options # # CONFIG_USE_GRUB is not set CONFIG_USE_AUTOBOOT=y CONFIG_AUTOBOOT_FILE="hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,38400" CONFIG_AUTOBOOT_DELAY=5
# # Drivers # CONFIG_IDE_DISK=y CONFIG_IDE_DISK_POLL_DELAY=0 # CONFIG_SLOW_SATA is not set # CONFIG_PCMCIA_CF is not set # CONFIG_USB_NEW_DISK is not set # CONFIG_USB_DISK is not set CONFIG_FLASH_DISK=y CONFIG_SUPPORT_PCI=y # CONFIG_PCI_BRUTE_SCAN is not set # CONFIG_SUPPORT_SOUND is not set
# # Filesystems # CONFIG_FSYS_EXT2FS=y # CONFIG_FSYS_FAT is not set # CONFIG_FSYS_JFS is not set # CONFIG_FSYS_MINIX is not set # CONFIG_FSYS_REISERFS is not set # CONFIG_FSYS_XFS is not set # CONFIG_FSYS_ISO9660 is not set # CONFIG_FSYS_CRAMFS is not set # CONFIG_FSYS_SQUASHFS is not set
# # Loaders # CONFIG_LINUX_LOADER=y # CONFIG_WINCE_LOADER is not set # CONFIG_ARTEC_BOOT is not set
# # Debugging & Experimental # # CONFIG_EXPERIMENTAL is not set # CONFIG_DEBUG_ALL is not set # CONFIG_DEBUG_ELFBOOT is not set # CONFIG_DEBUG_ELFNOTE is not set # CONFIG_DEBUG_SEGMENT is not set # CONFIG_DEBUG_SYS_INFO is not set # CONFIG_DEBUG_BLOCKDEV is not set # CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_FSYS_EXT2FS is not set # CONFIG_DEBUG_PCI is not set # CONFIG_DEBUG_LINUXLOAD is not set # CONFIG_DEBUG_IDE is not set # CONFIG_DEBUG_FLASH is not set
BTW I can't build r80 it gives following errors:
make CC build/i386/context.o AS build/i386/switch.S.o CC build/i386/segment.o CC build/i386/timer.o CC build/i386/sys_info.o CC build/i386/linux_load.o CC build/main/filo.o /home/wiz/dev/coreboot/filo-r80/main/filo.c: In function ‘platform_reboot’: /home/wiz/dev/coreboot/filo-r80/main/filo.c:97: warning: implicit declaration of function ‘grub_printf’ CC build/main/elfload.o CC build/main/elfnote.o CC build/main/ipchecksum.o CC build/main/strtox.o CC build/fs/blockdev.o CC build/fs/vfs.o CC build/fs/fsys_ext2fs.o CC build/drivers/ide.o CC build/drivers/intel.o CC build/drivers/flash/lxflash.o /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c: In function ‘NAND_close’: /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c:528: warning: no return statement in function returning non-void /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c: In function ‘NAND_readPage’: /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c:652: warning: unused variable ‘bData’ /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c: At top level: /home/wiz/dev/coreboot/filo-r80/drivers/flash/lxflash.c:349: warning: ‘NAND_writeData’ defined but not used LD build/filo /home/wiz/dev/coreboot/filo-r80/build/main/filo.o: In function `platform_reboot': filo.c:(.text+0xa): undefined reference to `grub_printf' make: *** [/home/wiz/dev/coreboot/filo-r80/build/filo] Error 1
Hi Roman,
On Wed, Oct 08, 2008 at 01:26:01AM +0300, Mail Lists wrote:
Don't know what this actually means. Did anybody have this kind of problem? Is there any know-how to make it work? Or does it actually work at all?
It does work. I have two alix.2c3's in production with coreboot. I used buildrom to build the images. Try that first maybe?
Thanks, Ward.
On Wednesday 08 October 2008 03:15:29 Ward Vandewege wrote:
Hi Roman,
On Wed, Oct 08, 2008 at 01:26:01AM +0300, Mail Lists wrote:
Don't know what this actually means. Did anybody have this kind of problem? Is there any know-how to make it work? Or does it actually work at all?
It does work. I have two alix.2c3's in production with coreboot. I used buildrom to build the images. Try that first maybe?
Hmm... didn't notice this tool Will try for sure today! Thanks for hint!
Roman
-
Mail Lists -
Peter Stuge -
Roman Yeryomin
-
Roman Yeryomin -
ron minnich -
Ward Vandewege