Also, I think I tracked down the commit that that tree was based on:
5d0601767f vendorcode/amd/agesa/fam10: Build as a static library (2014-12-08)
Method:
I believe that coreboot's most changed file is /Makefile.inc, so I checked out every revision of that file and compared it to their Makefile.inc. That narrowed it down to somewhere in this range:
Commit ID: 5839635add, Lines Different: 35 Commit ID: a234f45601, Lines Different: 0 Commit ID: 24cca75b47, Lines Different: 4
Here's the command: ``` for commit in $(git log --pretty=%h 4.0..origin/master http://4.0..origin/master -- Makefile.inc); do git checkout $commit >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff Makefile.inc ../coreboot-mx84/Makefile.inc | wc -l)" ; done ```
Then taking the commit ids before and after the identical Makefile.inc, I did a diff of the entire tree to find the minimum:
Commit ID: b713d93525, Lines Different: 1391 Commit ID: a3a722c5fc, Lines Different: 1382 Commit ID: 5d0601767f, Lines Different: 1366 Commit ID: fd1349bb49, Lines Different: 1945 Commit ID: 99a3bba171, Lines Different: 2882
And the command: ``` for commit in $(git log --pretty=%h 24cca75b47..5839635add); do git checkout $commit >/dev/null 2>&1; git reset HEAD --hard >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff -r /work/git/coreboot-https /work/git/coreboot-mx84 | wc -l)" ; done ```
Looking at what's contained in the repo on github, I'd probably delete crossgcc/xgcc and crossgcc/tarballs from git, but that's up to you.
Hope this helps.
Martin
Dec 22, 2022, 14:10 by coreboot@coreboot.org:
Hi Hal, Thanks for bringing this up. I've added it to the agenda of the next coreboot leadership meeting to discuss how we want to handle this.
I'll reach out to the SFC again to see what we should expect in cases like this.
Martin
Dec 22, 2022, 13:42 by hal.martin@gmail.com:
Hello,
Meraki provided the coreboot source code for the MX84 on 2022-12-09.
I have uploaded the MX84 coreboot source code provided by Meraki to GitHub: https://github.com/halmartin/coreboot-mx84
The coreboot source code for the MX250 still has not been provided.
Kind regards, Hal
On Thu, Jun 30, 2022 at 3:47 AM ron minnich rminnich@gmail.com wrote:
I've asked the software freedom conservancy to take a look.
On Wed, Jun 29, 2022, 2:48 PM Hal Martin hal.martin@gmail.com wrote:
Hello,
Several Cisco Meraki products (MX84, MX250) are using the coreboot bootloader. Meraki are also distributing coreboot builds for these products via their update mechanism.
In October 2021, I requested the corresponding coreboot source code for the MX84 from open-source@meraki.com. Another individual requested the coreboot source code for the MX250 around the same time. We own the devices in quesiton.
To date, Meraki have not provided the source code or provided an explanation as to the delay in providing the source code. The last reply I received was in January, and they have not replied to any of my follow up requests.
As coreboot is GPL licensed software, I wanted to inform the coreboot community that I believe Cisco Meraki are not acting in good faith and are, in my opinion, violating the GPL by not providing the coreboot source code upon request.
Kind regards, Hal Martin _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
Dear Martin,
Am 23.12.22 um 01:00 schrieb Martin Roth via coreboot:
Also, I think I tracked down the commit that that tree was based on:
5d0601767f vendorcode/amd/agesa/fam10: Build as a static library (2014-12-08)
Method:
[…]
Looking at what's contained in the repo on github, I'd probably delete crossgcc/xgcc and crossgcc/tarballs from git, but that's up to you.
Thank you for figuring this all out. I attach the diffstat, and only note some things:
1. Build script, which seems only be used early on though:
$ more build_coreboot.sh #!/bin/sh
make clean cd payloads/external/SeaBIOS/seabios/ make cd ../../../.. make
2. The payload.elf is not SeaBIOS though. It seems to be *miles* (the Meraki Intermediate Loader for Embedded Systems), and it uses libpayload and libfdt, and the source is in `meraki/miles/main/`.
3. Top directory `.config` is configured for intel/mohonpeak. The same for `meraki/configs/config.mx84`.
``` $ diff -u .config meraki/configs/config.mx84 --- .config 2023-01-02 17:11:06.208154535 +0100 +++ meraki/configs/config.mx84 2023-01-02 17:11:06.212154551 +0100 @@ -115,7 +115,7 @@ CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0x4000 CONFIG_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LiteOn" +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Cisco Meraki" # CONFIG_PCI_64BIT_PREF_MEM is not set CONFIG_UART_FOR_CONSOLE=1 CONFIG_ID_SECTION_OFFSET=0x80 @@ -139,7 +139,7 @@ CONFIG_INCLUDE_ME=y # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x800000 -CONFIG_FSP_FILE="component/FSP/fsp_v400_debug.bin" +CONFIG_FSP_FILE="component/FSP/fsp_v405.bin" CONFIG_CBFS_SIZE=0x00200000 CONFIG_ENABLE_FSP_FAST_BOOT=y CONFIG_VIRTUAL_ROM_SIZE=0x1000000 @@ -460,8 +460,8 @@ # CONFIG_GENERATE_MP_TABLE is not set # CONFIG_GENERATE_PIRQ_TABLE is not set CONFIG_GENERATE_SMBIOS_TABLES=y -CONFIG_MAINBOARD_SERIAL_NUMBER="2015-10-27" -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GRM-1001-MK" +CONFIG_MAINBOARD_SERIAL_NUMBER="" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MX84-HW"
# # Payload @@ -474,7 +474,7 @@ # CONFIG_PAYLOAD_GRUB2 is not set # CONFIG_PAYLOAD_TIANOCORE is not set # CONFIG_SEABIOS_THREAD_OPTIONROMS is not set -CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" +CONFIG_PAYLOAD_FILE="payload.elf" CONFIG_COMPRESSED_PAYLOAD_LZMA=y
# ```
4. `src/mainboard/intel/mohonpeak/gpio.h` was adapted.
5. The difference between the two (new) microcode header files is just the removed license header and header comments.
a) `component/Microcode/microcode-m01406d8128.h` b) `src/vendorcode/intel/fsp/rangeley/include/microcode-m01406d8128.h`
6. The referenced FSP files are missing in `component`.
7. `meraki/Makefile` is new and can be used for building. It even has a target `libpayload-menuconfig`.
libpayload-menuconfig: $(MAKE) -C $(LIBPAYLOAD_DIR) DOTCONFIG=$(CONFIGS_DIR)/config.libpayload.$(PLATFORM) menuconfig
If that is really the source, that built the image, than from the coreboot side, the cisco/meraki seems to be intel/mohonpeak with a few GPIO changes, and a libpayload based payload *miso*.
Kind regards,
Paul