[LinuxBIOS] new target iei juki-511p/rocky-512

[Nikolay Petukhov]

Hi,

2007/6/3, Stefan Reinauer :
> Please sign off the patch according to
> http://www.linuxbios.org/Development_Guidelines#Sign-off_Procedure
> so we can check this patch in!

Add sign-off.

2007/6/3, Juergen Beisert :
> As your dmesg output shows, the graphical console is active. I missed
> something to setup correctly. When my LinuxBIOS activates the VGA the linux
> console runs as expected. Without it, everything seems ok, but no output
> occures. I don't know why, yet.

How You activates VGA in LinuxBios?

2007/6/3, Uwe Hermann :
> On Sun, Jun 03, 2007 at 12:20:10AM +0600, Nikolay Petukhov wrote:
> > Problems:
> > Filo load bzImage only from ide0.
>
> What does not work? ide1? AFAICS the boards only have one IDE port!?

The this boards has two IDE ports. IDE0 has 40-pin IDE connector. IDE1
has CF connector.
> > diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c
> > --- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c        1970-01-01 05:00:00.000000000 +0500
> > +++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c   2007-06-02 20:02:10.000000000 +0600
>
> Please rename the directory to 'juki-511p' if possible, as that seems to be
> the canonical (lowercase'd) name used by the vendor.

I had change directory name to 'juki_511p'.
> > +#include "superio/winbond/w83977fa/w83977fa_early_serial.c"
>
> Maybe this should be 'w83977f' (without the 'a')? IIRC, we omitted any
> '-A' or '-AW' suffix from other Super I/Os, too. Comments anyone?

I agree. I did it.
> > +void udelay(int usecs)
> > +{
> > int i;
> > for(i = 0; i < usecs; i++)
> >         outb(i&0xff, 0x80);
> >
> > +}
>
> Is this needed? There's a global implementation in the repository
> already.

I removed it.
> >        device pnp 3f0.4 on              # RTC
> >        end
>
> Is this ok if left empty?
>
> My 'lspnp -v' (on another mainboard) says:
>
> 00:04 PNP0b00 AT real-time clock
>     state = active
>         io 0x70-0x71
>         irq 8
>
> So maybe something like
>
> device pnp 3f0.4 on              # RTC
>     io 0x60 = 0x70
>     irq 0x70 = 8
>   end
>
> is needed here? I'm just guessing, though, please correct me if I'm
> wrong.
> >        device pnp 3f0.5 on              # Keyboard
> >           io 0x60 = 0x60
> >           io 0x62 = 0x64
> >          irq 0x70 = 0x01     # int  1 for PS/2 keyboard
> >          irq 0x72 = 0x0c     # int 12 for PS/2 mouse
>
> Why not like this? Easier to read, IMHO:
>
> irq 0x70 = 1     # int  1 for PS/2 keyboard
>   irq 0x72 = 12    # int 12 for PS/2 mouse
> > +const struct irq_routing_table intel_irq_routing_table = {
> > PIRQ_SIGNATURE,  /* u32 signature */
> > PIRQ_VERSION,    /* u16 version   */
> > 32+16*2,         /* There can be total 6 devices on the bus */
>                                            ^
>
> typo? --->                                     2?
>
> Maybe even
>
> 32+16*IRQ_SLOT_COUNT,         /* There can be IRQ_SLOT_COUNT devices on the bus */

I corrected it.
> > diff -Nru LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c
> > --- LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c        2005-07-06 23:11:02.000000000 +0600
> > +++ LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c   2007-05-31 16:06:40.000000000 +0600
> > @@ -324,6 +324,7 @@
> >       outb(0x70, 0x80);
> >   setGX1Mem(GX_BASE + MC_MEM_CNTRL2, 0x000007d8); /* Disable all CLKS, Shift = 3 */
> >
> > +//   setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92080000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=2.5 */
> >       setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */
> >       setGX1Mem(GX_BASE + MC_BANK_CFG,   0x00700070); /* No DIMMS installed */
> >       setGX1Mem(GX_BASE + MC_SYNC_TIM1,  0x3a733225); /* LTMODE=3, RC=10, RAS=7, RP=3, RCD=3, RRD=2, DPL=2 */
>
> OK, not sure what we should do with this. Will it break other GX1-based
> mainboards? Or is it generic for all GX1s?

I removed it.
> > diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h
> > --- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h      1970-01-01 05:00:00.000000000 +0500
> > +++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h 2007-06-02 18:52:57.000000000 +0600
>
> Please provide an extra patch for the addition of the new Super I/O,
> this is independant of the mainboards...
> > diff -Nru LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb
> > --- LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb   1970-01-01 05:00:00.000000000 +0500
> > +++ LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb      2007-06-02 19:07:21.000000000 +0600
>
> Please add a copyright header to this file, too.

Signed-off-by: Nikolay Petukhov

[Uwe Hermann]

On Mon, Jun 04, 2007 at 06:15:17PM +0600, Nikolay Petukhov wrote:
> 2007/6/3, Stefan Reinauer :
> > Please sign off the patch according to
> > http://www.linuxbios.org/Development_Guidelines#Sign-off_Procedure
> > so we can check this patch in!
>
> Add sign-off.

Thanks!

The Super I/O patch is committed as r2714, the JUKI-511P code in r2716,
both with minor cosmetic changes.

I also renamed the directory to juki-511p (minus vs. underscore).
> > What does not work? ide1? AFAICS the boards only have one IDE port!?
>
> The this boards has two IDE ports. IDE0 has 40-pin IDE connector. IDE1
> has CF connector.

Ah, ok. Does booting from IDE1 work with a proprietary BIOS? Try my
CS5530 patch, that _may_ fix the problem (it initializes both IDE0 and
IDE1). Some more IDE work may be needed in LinuxBIOS, though.

Please post a boot log with the CS5530 patch applied.
> +#dir /pc80
> +#config chip.h

Why is this commented? Not needed?
>    device pci 12.1 on  end		# SMI
>    device pci 12.2 on  end		# IDE
>    device pci 12.3 on  end 	# Audio
>  	device pci 12.4 on  end		# VGA onboard

With my CS5530 patch you might need to enable IDE0/IDE1 explicitly here:

register "ide0_enable" = "1"
      register "ide1_enable" = "1"

Thanks, Uwe.

[Peter Stuge]

On Thu, Jun 07, 2007 at 11:01:41PM +0200, Uwe Hermann wrote:
> Ah, ok. Does booting from IDE1 work with a proprietary BIOS?

I think this is a FILO problem.

//Peter

[Carl-Daniel Hailfinger]

On 07.06.2007 23:01, Uwe Hermann wrote:
> The Super I/O patch is committed as r2714, the JUKI-511P code in r2716,
> both with minor cosmetic changes.
>
> I also renamed the directory to juki-511p (minus vs. underscore).

The abuild of your checkin fails. Any reasons for that?

Regards,
Carl-Daniel

[Uwe Hermann]

On Fri, Jun 08, 2007 at 04:48:32PM +0200, Carl-Daniel Hailfinger wrote:
> On 07.06.2007 23:01, Uwe Hermann wrote:
> > The Super I/O patch is committed as r2714, the JUKI-511P code in r2716,
> > both with minor cosmetic changes.
> >
> > I also renamed the directory to juki-511p (minus vs. underscore).
>
> The abuild of your checkin fails. Any reasons for that?

Yes, I guess the CS5530 code is not compiling. It was probably broken
all the time, I'm really curious why it didn't break stuff earlier...

My CS5530 patch (not yet committed) should fix that.

Uwe.

[LinuxBIOS] Trouble with new CS5530 southbridge code

[Jonathan Sturges]

Hi,
I'm making progress getting LB working on a Geode GX1-based winterm. 
I'm getting very close to creating a new target for this terminal, but 
for the moment am working with the eaglelion/5bcm target, as it's nearly 
identical.
So I thought I'd try the new CS5530 code from last month, but I'm having 
IDE troubles.  Even with:

register "ide0_enable" = "1"
    register "ide1_enable" = "1"

...in my Config.lb, my system's Primary IDE gets disabled, and the 
Secondary enabled.

The 5530 patch looks correct to me, so I don't think that's it.  I also 
double-checked that the CS5530 uses the same bits and register for 
enabling the IDE controllers as the CS5530A, which of course it does.

Any thoughts on what to check next?  I'm eager to try the new code.

thanks,
Jonathan

[LinuxBIOS] Trouble with new CS5530 southbridge code

[Jonathan Sturges]

Jonathan Sturges wrote:
> Hi,
> I'm making progress getting LB working on a Geode GX1-based winterm. 
> I'm getting very close to creating a new target for this terminal, but 
> for the moment am working with the eaglelion/5bcm target, as it's nearly 
> identical.
> So I thought I'd try the new CS5530 code from last month, but I'm having 
> IDE troubles.  Even with:
>
> register "ide0_enable" = "1"
>    register "ide1_enable" = "1"
>
> ...in my Config.lb, my system's Primary IDE gets disabled, and the 
> Secondary enabled.
>
> The 5530 patch looks correct to me, so I don't think that's it.  I also 
> double-checked that the CS5530 uses the same bits and register for 
> enabling the IDE controllers as the CS5530A, which of course it does.
>
> Any thoughts on what to check next?  I'm eager to try the new code.
>
> thanks,
> Jonathan

Following up on my own question, I found the problem.  There was a 
misplaced 'end' in the mainboard's Config.lb that was causing the 
ideX_enable register settings to be out of context.

-Jonathan