Re: [coreboot] [PATCH][RFC] A new way using a binary file to add-stage to a rom file on ARM

[Bari Ari]

On 07/20/2011 12:27 AM, Hamo wrote:
> Thanks. Since we want to make use of the romstage code, we need a CPU 
> that supports boot from SPI or Nor Flash (because we need to run code 
> in the rom) and a board that has a SPI or Nor Flash on it.

There are ARM boards around that use a SPI or NOR flash to store the 
init and bootloader but most new boards and tablets store it in NAND or 
eMMC with support for SD Card, serial or USB boot as well. The boot 
device order is set by pin straps. If the cpu doesn't see a boot string 
it will scan the next peripheral port until it finds one.

http://www.mini-box.com/mini2440v2  is an old ARM9 dev board that is 
still readily available the uses a 2MB NOR Flash for init and 
bootloader. Most ARM systems that will make use of coreboot won't have a 
separate SPI or NOR flash to hold the init and bootloader. But you have 
to start somewhere. We'll just have to make this work from on-board 
NAND, eMMC or SD Card later.

-Bari

[PATCH][RFC] A new way using a binary file to add-stage to a rom file on ARM

[Hamo]

On Wed, Jul 20, 2011 at 11:29 PM, Bari Ari  wrote:
> http://www.mini-box.com/mini2440v2  is an old ARM9 dev board that is still
> readily available the uses a 2MB NOR Flash for init and bootloader. Most ARM
> systems that will make use of coreboot won't have a separate SPI or NOR
> flash to hold the init and bootloader. But you have to start somewhere.
> We'll just have to make this work from on-board NAND, eMMC or SD Card later.

If we don't add romstage to the romfile and don't compress the
ramstage since the decompress code is too big for bootblock we can
boot from the NAND Flash or SD card. In the ramstage, we init the
Flash controller so that we can read the payload and kernel from the
NAND flash later.
I don't test my thought yet. Maybe it doesn't work for that I may
assume something like we have a romstage in my code.