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Hi all,
Today I managed to boot kernel and userspace on the Asus M2V-MX SE (K8M890 VT8237S AMD am2 socket + SPI flash in socket)
What works:
1) IDE 2) serial line 3) USB 4) APCI poweroff with halt command + some basic ACPI powerbutton event 5) APICs are routing irqs
I will test more stuff later.
Known issues: 1) slow boot, perhaps SPI timming is too low 2) cpu freq change does not work 3) sata seems not to work 4) PCI IRQ routing does not work for external cards 5) v-link set to 8 bit (default)
Attached patch is mine WIP state of the tree.
Rudolf
Dear Rudolf,
Am Freitag, den 27.06.2008, 21:49 +0200 schrieb Rudolf Marek:
Today I managed to boot kernel and userspace on the Asus M2V-MX SE (K8M890 VT8237S AMD am2 socket + SPI flash in socket)
These are great news. Thank you very much for your effort. It looks like soon I will be able to have my first computer to use coreboot.
Thanks again and good luck,
Paul
Hi Rudolf,
On 27.06.2008 21:49, Rudolf Marek wrote:
Hi all,
Today I managed to boot kernel and userspace on the Asus M2V-MX SE (K8M890 VT8237S AMD am2 socket + SPI flash in socket)
What works:
- IDE
- serial line
- USB
- APCI poweroff with halt command + some basic ACPI powerbutton event
- APICs are routing irqs
This is absolutely GREAT!
Regards, Carl-Daniel
This is fantastic news. Thanks for your patch.
I have noticed two good things happening as we get more people involved in this project. First is just the increased level of ability of the people, as they learn the ins and outs of the CPUs we support and help each other out. The second is that new ports seem to come with ACPI support right away more often than before. This means I'd better learn ACPI better :-)
It just seems to me that people are getting better and better at this type of work, which is very nice to see happening.
Thanks, Rudolf, you might want to consider an official patch. I realize your port may not be perfect (to you :-), but I think it's worth getting it in to the tree if you have no objections.
Thanks again.
ron
Hi all,
This is fantastic news. Thanks for your patch.
Yes it is ;)
I have noticed two good things happening as we get more people involved in this project. First is just the increased level of ability of the people, as they learn the ins and outs of the CPUs we support and help each other out. The second is that new ports seem to come with ACPI support right away more often than before. This means I'd better learn ACPI better :-)
Well I started the wiki page, I think I learned a lot from coreboot, but now maybe we should concentrate on how to transfer this knowledge.
Thanks, Rudolf, you might want to consider an official patch. I realize your port may not be perfect (to you :-), but I think it's worth getting it in to the tree if you have no objections.
Well there are some quirks in the patch, this needs to be sorted out first. Especially someone is setting the the clocks for IT8705 to the other way round, and I think on some places I might broke something on KT890 and VT8237R.
Later revisions of IT8705 have internal watchdog which must be turn off etc...
Maybe I really should prepare something, last time I did flashrom support for VT8237S and ICH7, Stephan re-implemented the ICH7 just yesterday :/
Again the flashrom work was in quite good shape but I need to change the probing of SPI to 4 bytes ID, and I did not get back to that.
Anyway. I need to go now for a weekend AFK ;)
Enjoy yours,
Rudolf
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Hi all,
I'm posting yet another WIP patch. Still no progress on SATA, powernow-k8 and slow SPI access (slow boot when executing from flash). I did not try VGA yet.
Other stuff works fine: IDE, USB, PCI slots, serial, ACPI, APIC, network.
This patch (compared to older WIP patch) adds support for the integrated network adapter without any external configuration flash plus it programs the chipset to handle the LDTSTOP signal, so the CPU is switched to maxFID/maxVID - but frequency changes are not working in Linux yet.
The network address is "00:00:DE:AD:BE:EF" as default. PHY has addr 1 as recommended.
I need to ask VIA for some details. Will do that soon.
Rudolf
Dear Rudolf,
I was just reading vt8237_ctrl.c without understanding anything besides your comments. I found three spelling mistakes.
I know, that it is probably too early for this, but before I will forget them, I just post it here.
Thanks again,
Paul
PS: Is it actually preferred to quote the whole file or just the relevant sections? I guess a patch would be even better, but I do not have the svn-tree here, so a patch on a patch sounds strange for me.
Am Freitag, den 27.06.2008, 21:49 +0200 schrieb Rudolf Marek:
--- src/southbridge/via/vt8237r/vt8237_ctrl.c (revision 0) +++ src/southbridge/via/vt8237r/vt8237_ctrl.c (revision 0) @@ -0,0 +1,215 @@ +/*
- This file is part of the coreboot project.
- Copyright (C) 2007 Rudolf Marek r.marek@assembler.cz
Also 2008?
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License v2 as published by
- the Free Software Foundation.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
+#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include <console/console.h>
+/* We support here K8M890/K8T890 and VT8237/S/A PCI1/Vlink which setup
- */
+static void vt8237_cfg(struct device *dev) +{
u8 regm, regm2, regm3;device_t devfun3;devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_K8T890CE_3, 0);if (!devfun3)devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_K8M890CE_3, 0);if (!devfun3)die("Unknown NB");+//70: c2 c8 ee 01 3c 0f 50 48 01 00 00 00 77 00 12 12
/* CPU to PCI Flow Control 1 & 2, just fill in recommended */pci_write_config8(dev, 0x70, 0xc2);pci_write_config8(dev, 0x71, 0xc8);/* PCI Control */pci_write_config8(dev, 0x72, 0xee);pci_write_config8(dev, 0x73, 0x01);pci_write_config8(dev, 0x74, 0x3c);pci_write_config8(dev, 0x75, 0x0f);pci_write_config8(dev, 0x76, 0x50);pci_write_config8(dev, 0x77, 0x48);pci_write_config8(dev, 0x78, 0x01);/* APIC on HT */pci_write_config8(dev, 0x7c, 0x77); //maybe Enable LDT APIC Mode bit3 set to 1/* WARNING: Need to copy some registers from NB (D0F3) to SB (D11F7). */regm = pci_read_config8(devfun3, 0x88); /* Shadow mem CTRL */pci_write_config8(dev, 0x57, regm);regm = pci_read_config8(devfun3, 0x80); /* Shadow page C */pci_write_config8(dev, 0x61, regm);regm = pci_read_config8(devfun3, 0x81); /* Shadow page D */pci_write_config8(dev, 0x62, regm);/* Shadow page F + memhole copy */regm = pci_read_config8(devfun3, 0x83);pci_write_config8(dev, 0x63, regm);regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */pci_write_config8(dev, 0x64, regm);regm = pci_read_config8(devfun3, 0x86); /* SMM and APIC decoding */pci_write_config8(dev, 0xe6, regm);+}
+/**
- Setup the V-Link for VT8237R, 8X mode.
- For K8T890CF VIA recommends what is in VIA column, AW is award 8X:
REG DEF AW VIA-8X VIA-4X
-----------------------------
- NB V-Link Manual Driving Control strobe 0xb5 0x46 0x46 0x88 0x88
- NB V-Link Manual Driving Control - Data 0xb6 0x46 0x46 0x88 0x88
- NB V-Link Receiving Strobe Delay 0xb7 0x02 0x02 0x61 0x01
- NB V-Link Compensation Control bit4,0 (b5,b6) 0xb4 0x10 0x10 0x11 0x11
- SB V-Link Strobe Drive Control 0xb9 0x00 0xa5 0x98 0x98
- SB V-Link Data drive Control???? 0xba 0x00 0xbb 0x77 0x77
- SB V-Link Receive Strobe Delay???? 0xbb 0x04 0x11 0x11 0x11
- SB V-Link Compensation Control bit0 (use b9) 0xb8 0x00 0x01 0x01 0x01
- V-Link CKG Control 0xb0 0x05 0x05 0x06 0x03
- V-Link CKG Control 0xb1 0x05 0x05 0x01 0x03
- */
+static void vt8237s_vlink_init(struct device *dev) +{
u8 reg;device_t devfun7;devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_K8T890CE_7, 0);if (!devfun7)devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_K8M890CE_7, 0);/* no pairing NB found */if (!devfun7)return;/** This init code is valid only for the VT8237S! For different* sounthbridges (e.g. VT8237A, VT8237S, VT8237R (without plus R)
s/sounthbridges/southbridges/
* and VT8251) a different init code is required.*/pci_write_config8(devfun7, 0xb5, 0x66);pci_write_config8(devfun7, 0xb6, 0x66);pci_write_config8(devfun7, 0xb7, 0x65);reg = pci_read_config8(devfun7, 0xb4);reg |= 0x1;pci_write_config8(devfun7, 0xb4, reg);pci_write_config8(dev, 0xb9, 0x68);pci_write_config8(dev, 0xba, 0x88);pci_write_config8(dev, 0xbb, 0x89);reg = pci_read_config8(dev, 0xbd);reg |= 0x3;pci_write_config8(dev, 0xbd, reg);/* Program V-link 8X 8bit full duplex, parity disabled.FIXME */pci_write_config8(dev, 0x48, 0x13);+}
+static void ctrl_enable(struct device *dev) { +/* enable the 0:13 and 0:13.1 */
/* FIXME */pci_write_config8(dev, 0x4f, 0x43);+}
+extern void dump_south(device_t dev);
+static void ctrl_init(struct device *dev) {
/* TODO: Fix some ordering issue fo V-link set Rx77[6] and PCI1_Rx4F[0]
s/fo/for/
should to 1 FIXME DO you need?*//* VT8237R specific configuration other SB are done in their own directories *///FIXME add A versiondevice_t devsb = dev_find_device(PCI_VENDOR_ID_VIA,0x3372 , 0);if (devsb) {+// vt8237s_vlink_init(dev);
}/* configure PCI1 and copy mirror registers from D0F3 */vt8237_cfg(dev);dump_south(dev);+}
+static const struct device_operations ctrl_ops = {
.read_resources = pci_dev_read_resources,.set_resources = pci_dev_set_resources,.enable_resources = pci_dev_enable_resources,.init = ctrl_init,.enable = ctrl_enable,.ops_pci = 0,+};
+static const struct pci_driver northbridge_driver_t __pci_driver = {
.ops = &ctrl_ops,.vendor = PCI_VENDOR_ID_VIA,.device = 0x287e, //D11F7+};
+/* +00: 06 11 7e 28 06 01 10 02 00 00 00 06 00 80 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 7e 33 +30: 00 00 00 00 58 00 00 00 00 00 00 00 00 00 00 00 +40: f4 24 00 80 82 00 00 00 13 3b 88 80 82 44 80 43 +50: 80 8f d3 01 00 04 01 20 08 00 01 80 00 00 00 00 +60: 00 2a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: c2 c8 ee 01 3c 0f 50 48 01 00 00 00 77 00 12 12 +80: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: fd 3f df 00 00 00 00 e0 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 68 88 88 89 00 03 00 00 +c0: 01 00 02 00 00 00 00 00 0c 06 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 19 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 +*/
-
Carl-Daniel Hailfinger -
Paul Menzel -
ron minnich -
Rudolf Marek