The following mainboards had a file named microcode_updates.c in their mainboard directories, but the code was not referenced anywhere. intel/jarrell dell/s1850 supermicro/x6dhr_ig2 supermicro/x6dhr_ig supermicro/x6dhe_g2 supermicro/x6dhe_g Besides that, the contents of these files were either duplicates of src/cpu/intel/model_f3x/microcode_M1DF340E.h or src/cpu/intel/model_f3x/microcode_M1DF3413.h.
To apply this removal, execute svn remove for the following files: src/mainboard/supermicro/x6dhe_g/microcode_updates.c src/mainboard/supermicro/x6dhe_g2/microcode_updates.c src/mainboard/supermicro/x6dhr_ig/microcode_updates.c src/mainboard/supermicro/x6dhr_ig2/microcode_updates.c src/mainboard/dell/s1850/microcode_updates.c src/mainboard/intel/jarrell/microcode_updates.c
Abuild tested, as expected no failures.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
No patch attached because a pure removal patch sized 148 kB is a bit too large to be sent without a need for code review.
Carl-Daniel Hailfinger wrote:
The following mainboards had a file named microcode_updates.c in their mainboard directories, but the code was not referenced anywhere. intel/jarrell dell/s1850 supermicro/x6dhr_ig2 supermicro/x6dhr_ig supermicro/x6dhe_g2 supermicro/x6dhe_g Besides that, the contents of these files were either duplicates of src/cpu/intel/model_f3x/microcode_M1DF340E.h or src/cpu/intel/model_f3x/microcode_M1DF3413.h.
To apply this removal, execute svn remove for the following files: src/mainboard/supermicro/x6dhe_g/microcode_updates.c src/mainboard/supermicro/x6dhe_g2/microcode_updates.c src/mainboard/supermicro/x6dhr_ig/microcode_updates.c src/mainboard/supermicro/x6dhr_ig2/microcode_updates.c src/mainboard/dell/s1850/microcode_updates.c src/mainboard/intel/jarrell/microcode_updates.c
Abuild tested, as expected no failures.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
No patch attached because a pure removal patch sized 148 kB is a bit too large to be sent without a need for code review.
Acked-by: Corey Osgood corey.osgood@gmail.com
how long has it been since we've updated the microcode updates?
Quoting Corey Osgood corey.osgood@gmail.com:
Acked-by: Corey Osgood corey.osgood@gmail.com
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks like an update is in order, but I wouldn't know where to start.
Thanks - Joe
Quoting Martin.Karlsson@emerson.com:
Hello,
Yesterday I wrote some code for the Syslinux boot loader that is meant to boot different images based on which revision of the CPU microcode that is currently loaded in the CPU (yes, this is a bit strange but we have a very good reason for it). I then compared my implementation with a few others an ran across yours, in http://www.openbios.org/viewvc/trunk/LinuxBIOSv2/src/cpu/intel/microcode /microcode.c?view=markup
Question to you guys: why is the first wrmsr instruction there? From my understanding, by not properly initialising ECX, EAX and EDX this will overwrite whatever is in the MSR pointed to by ECX?!
BTW I tried out your code on our target hardware (Intel Celeron M, 600 MHz) and with that first wrmsr line in place it hangs and without it, it runs just fine.
Just wanted to let you know.
Best regards, Martin Karlsson
On Dec 29, 2007 9:00 PM, joe@smittys.pointclark.net wrote:
Quoting Corey Osgood corey.osgood@gmail.com:
Acked-by: Corey Osgood corey.osgood@gmail.com
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks like an update is in order, but I wouldn't know where to start.
Thanks - Joe
Quoting Martin.Karlsson@emerson.com:
Hello,
Yesterday I wrote some code for the Syslinux boot loader that is meant to boot different images based on which revision of the CPU microcode that is currently loaded in the CPU (yes, this is a bit strange but we have a very good reason for it). I then compared my implementation with a few others an ran across yours, in http://www.openbios.org/viewvc/trunk/LinuxBIOSv2/src/cpu/intel/microcode /microcode.c?view=markup
Question to you guys: why is the first wrmsr instruction there? From my understanding, by not properly initialising ECX, EAX and EDX this will overwrite whatever is in the MSR pointed to by ECX?!
BTW I tried out your code on our target hardware (Intel Celeron M, 600 MHz) and with that first wrmsr line in place it hangs and without it, it runs just fine.
Just wanted to let you know.
Best regards, Martin Karlsson
-- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
I submitted the patch to remove this extraneous wrmsr a while back. I can't recall if it was acked and committed, but I thought it was.
I have two other patches in limbo: 1. fix to buildtarget to enable switches like -fno-stack-protector 2. fix to lib/lar.c to enable parameter passing to lar executables.
thanks
ron
ron minnich wrote:
On Dec 29, 2007 9:00 PM, joe@smittys.pointclark.net wrote:
Quoting Corey Osgood corey.osgood@gmail.com:
Acked-by: Corey Osgood corey.osgood@gmail.com
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks like an update is in order, but I wouldn't know where to start.
Thanks - Joe
Quoting Martin.Karlsson@emerson.com:
Hello,
Yesterday I wrote some code for the Syslinux boot loader that is meant to boot different images based on which revision of the CPU microcode that is currently loaded in the CPU (yes, this is a bit strange but we have a very good reason for it). I then compared my implementation with a few others an ran across yours, in http://www.openbios.org/viewvc/trunk/LinuxBIOSv2/src/cpu/intel/microcode /microcode.c?view=markup
Question to you guys: why is the first wrmsr instruction there? From my understanding, by not properly initialising ECX, EAX and EDX this will overwrite whatever is in the MSR pointed to by ECX?!
BTW I tried out your code on our target hardware (Intel Celeron M, 600 MHz) and with that first wrmsr line in place it hangs and without it, it runs just fine.
Just wanted to let you know.
Best regards, Martin Karlsson
-- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
I submitted the patch to remove this extraneous wrmsr a while back. I can't recall if it was acked and committed, but I thought it was.
I don't recall the patch, nor can I find it. It's not in the original thread, and a gmail search for "microcode" doesn't bring it up.
I'm working on a microcode update patch right now, but it's going to require some refactoring of the current code, the current unified microcode update is 1.0MB. I've tried factoring it down to just the 6xx stuff, but it was still well over 500K
I have two other patches in limbo:
- fix to buildtarget to enable switches like -fno-stack-protector
I'll test this tomorrow, it's past 3am here. It also needs a sign-off.
-Corey
- fix to lib/lar.c to enable parameter passing to lar executables.
thanks
ron
ron minnich wrote:
On Dec 29, 2007 9:00 PM, joe@smittys.pointclark.net wrote:
Quoting Corey Osgood corey.osgood@gmail.com:
Acked-by: Corey Osgood corey.osgood@gmail.com
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks like an update is in order, but I wouldn't know where to start.
Thanks - Joe
Quoting Martin.Karlsson@emerson.com:
Hello,
Yesterday I wrote some code for the Syslinux boot loader that is meant to boot different images based on which revision of the CPU microcode that is currently loaded in the CPU (yes, this is a bit strange but we have a very good reason for it). I then compared my implementation with a few others an ran across yours, in http://www.openbios.org/viewvc/trunk/LinuxBIOSv2/src/cpu/intel/microcode /microcode.c?view=markup
Question to you guys: why is the first wrmsr instruction there? From my understanding, by not properly initialising ECX, EAX and EDX this will overwrite whatever is in the MSR pointed to by ECX?!
BTW I tried out your code on our target hardware (Intel Celeron M, 600 MHz) and with that first wrmsr line in place it hangs and without it, it runs just fine.
Just wanted to let you know.
Best regards, Martin Karlsson
-- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
I submitted the patch to remove this extraneous wrmsr a while back. I can't recall if it was acked and committed, but I thought it was.
No, this doesn't seem to have been taken care of yet. Is it read_microcode_rev() or intel_update_microcode() that needs the wrmsr removed?
Microcode updates coming in the morning, if the abuild passes.
-Corey
joe@smittys.pointclark.net wrote:
Microcode updates coming in the morning, if the abuild passes.
-Corey
SWEET :-)
Thanks - Joe
Well, it failed, but it was only one socket (603/604), and the problem's size.
Quoting Corey Osgood corey.osgood@gmail.com:
joe@smittys.pointclark.net wrote:
Microcode updates coming in the morning, if the abuild passes.
-Corey
SWEET :-)
Thanks - Joe
Well, it failed, but it was only one socket (603/604), and the problem's size.
Hmmmmm, not so sweet, how big is the microcode?
Thanks - Joe
On 30.12.2007 05:18, Corey Osgood wrote:
Carl-Daniel Hailfinger wrote:
The following mainboards had a file named microcode_updates.c in their mainboard directories, but the code was not referenced anywhere. intel/jarrell dell/s1850 supermicro/x6dhr_ig2 supermicro/x6dhr_ig supermicro/x6dhe_g2 supermicro/x6dhe_g Besides that, the contents of these files were either duplicates of src/cpu/intel/model_f3x/microcode_M1DF340E.h or src/cpu/intel/model_f3x/microcode_M1DF3413.h.
To apply this removal, execute svn remove for the following files: src/mainboard/supermicro/x6dhe_g/microcode_updates.c src/mainboard/supermicro/x6dhe_g2/microcode_updates.c src/mainboard/supermicro/x6dhr_ig/microcode_updates.c src/mainboard/supermicro/x6dhr_ig2/microcode_updates.c src/mainboard/dell/s1850/microcode_updates.c src/mainboard/intel/jarrell/microcode_updates.c
Abuild tested, as expected no failures.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Acked-by: Corey Osgood corey.osgood@gmail.com
Thanks, r3028.
how long has it been since we've updated the microcode updates?
Sorry, I have no idea.
Regards, Carl-Daniel