[v2] r4096 - trunk/coreboot-v2/src/superio/ite/it8712f

Author: ruik
Date: 2009-04-12 20:01:55 +0200 (Sun, 12 Apr 2009)
New Revision: 4096

Modified:
   trunk/coreboot-v2/src/superio/ite/it8712f/it8712f_early_serial.c
Log:
The IT8712F needs to have the configuration bits changed to handle the power for
memory correctly during suspend.s

Signed-off-by: Rudolf Marek 
Acked-by: Peter Stuge

Modified: trunk/coreboot-v2/src/superio/ite/it8712f/it8712f_early_serial.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8712f/it8712f_early_serial.c	2009-04-11 18:58:17 UTC (rev 4095)
+++ trunk/coreboot-v2/src/superio/ite/it8712f/it8712f_early_serial.c	2009-04-12 18:01:55 UTC (rev 4096)
@@ -32,6 +32,7 @@
 #define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */
 #define IT8712F_CONFIG_REG_CLOCKSEL  0x23 /* Clock Selection. */
 #define IT8712F_CONFIG_REG_SWSUSP    0x24 /* Software Suspend, Flash I/F. */
+#define IT8712F_CONFIG_REG_MFC       0x2a /* Multi-function control */
 #define IT8712F_CONFIG_REG_WATCHDOG  0x72 /* Watchdog control. */

#define IT8712F_CONFIGURATION_PORT   0x2e /* Write-only. */
@@ -78,6 +79,21 @@

}

+static void it8712f_enable_3vsbsw(void) {
+
+	/* We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2!
+	 LDN 7, reg 0x2a - needed for S3, or memory power will be cut off.
+	 Enable 3VSBSW#. (For System Suspend-to-RAM)
+	 0: 3VSBSW# will be always inactive.
+	 1: 3VSBSW# enabled. It will be (NOT SUSB#) NAND SUSC#.
+	*/
+
+	it8712f_enter_conf();
+	it8712f_sio_write(0x07, IT8712F_CONFIG_REG_MFC, 0x80);
+	it8712f_exit_conf();
+}
+
+
 static void it8712f_kill_watchdog(void)
 {
    it8712f_enter_conf();