[LinuxBIOS] Clarification of Raminit.c

[roger]

I'm kind of confused on this one...

How would I specify a DRAMC or CAS setting (after referring to the 440BX
intel spec pdf)?

For example:

--- Snip from Intel pdf ---
NBXCFG—NBX Configuration Register (Device 0)
Offset: 50–53h
Default: bits 31–16: 0000h
bits 15–0: 00S0-0000-000S-0S00b
Access: Read/
Size: 32 bits
...snip...
Bit
13:12  00 = 100 MHz, 11 = Reserved
--- End Snip from Intel pdf ---

Again, just using this as an example as values should be provided by SPD
values.  In i440bx/raminit.c, we set this with the following values:

NBXCFG, 0x00000000, 0xff00a00c,

I'm guessing the "0x00000000" & "0xff00a00c" values are calculated by
somehow adding all the settings possible for NBX and somehow, the value
is uniquely recognized by the Northbridge??

Sun May 13 01:39:19 PDT 2007

[roger]

On Sun, 2007-05-13 at 01:39 -0700, roger wrote:
> I'm kind of confused on this one...
>
> How would I specify a DRAMC or CAS setting (after referring to the 440BX
> intel spec pdf)?
>
> For example:
>
> --- Snip from Intel pdf ---
> NBXCFG—NBX Configuration Register (Device 0)
> Offset: 50–53h
> Default: bits 31–16: 0000h
> bits 15–0: 00S0-0000-000S-0S00b
> Access: Read/
> Size: 32 bits
> ...snip...
> Bit
> 13:12  00 = 100 MHz, 11 = Reserved
> --- End Snip from Intel pdf ---
>
> Again, just using this as an example as values should be provided by SPD
> values.  In i440bx/raminit.c, we set this with the following values:
>
> NBXCFG, 0x00000000, 0xff00a00c,
>
> I'm guessing the "0x00000000" & "0xff00a00c" values are calculated by
> somehow adding all the settings possible for NBX and somehow, the value
> is uniquely recognized by the Northbridge??

Looking at the function within raminit.c a comment reveals:

/* Table format: register, bitmask, value. */

So, I presume:

register == NBXCFG ???
bitmask == 0x00000000 ???
value == 0xff00a00c ???

Also presuming these hexadecimal word (32 bit) values were converted
from the original decimal notation.

Sun May 13 02:06:28 PDT 2007

[Corey Osgood]

roger wrote:
> Looking at the function within raminit.c a comment reveals:
>
> /* Table format: register, bitmask, value. */
>
> So, I presume:
>
> register == NBXCFG ???

see i440bx.h for the list of register defines, but yes that is the
register to be set.
> bitmask == 0x00000000 ???
> value == 0xff00a00c ???
>
> Also presuming these hexadecimal word (32 bit) values were converted
> from the original decimal notation.

see the other email I sent you, I think I forgot to cc the list, oops.
that's binary notation, btw. Don't ask me what the bitmask thing is all
about, just leave it at 0x0s for now. It is being used by
sdram_set_registers, I'm just not sure its intended purpose (perhaps for
spd setting?). I'll do some work on the 440 tomorrow, I need a break
from my current project anyways. Anyone gotten anywhere with the
SPD/SMBus stuff?

-Corey