Re: [coreboot] SimNOW V2 LAB problem

[Marc Karasek]

Ward, et all,

I have completed the test builds on my 32 bit machine.   Tried Filo, 
tint, coreinfo and LAB.  All were built with the latest coreinfo code.  
The version (3092) assoc with the SimNOW platform build does not have 
the lxbios in the tree and fails the checkout during the build.

What I have seen is that coreboot fails on final link with either
.ram can't be allocated in segment 0
or
.rom can't be allocated in segment 0

The only diff is the Config.lb file I used for coreboot.

I have attached both files.

One I had modified and the other is the original off a fresh checkout.  
(The only change was payload.elf -> payload.elf.lzma)

Maybe I am doing something wrong  in configuring coreboot..

Tinit & Coreinfo  both crashed on linking.  Both errors were the same:
ld terminated with signal 11 [Segmentaion Fault]

Marc

*********************
Marc Karasek
MTS
Sun Microsystems
mailto:[e-mail]
ph:770.360.6415
*********************

Ward Vandewege wrote:
> On Tue, May 13, 2008 at 04:27:40PM -0400, Marc Karasek wrote:
> > What version of binutils? 
> > The problem I am seeing on the 32 bit system seems to be a linker problem. 
> > My gcc is 4.1.2, I am leaning towards binutils,  I have 2.17.50.0.18-1 
> > 20070731.
>
> Aha.
>
> $ dpkg -l |grep binutils
> ii  binutils                          2.16.1cvs20060117-1ubuntu2.1
> The GNU assembler, linker and binary utiliti
>
> That's (a lot) older.
>
> Thanks,
> Ward.

# Sample config file for 
# the amd serengeti_cheetah 
# This will make a target directory of ./serengeti_cheetah

target serengeti_cheetah
mainboard amd/serengeti_cheetah

option ROM_SIZE = 0x100000
option USE_FAILOVER_IMAGE=0
option HAVE_FAILOVER_BOOT=0
option FAILOVER_SIZE=0

romimage "fallback"
    option CONFIG_PRECOMPRESSED_PAYLOAD=1
    option CONFIG_COMPRESSED_PAYLOAD_LZMA=1
    option FALLBACK_SIZE=ROM_SIZE
    option USE_FALLBACK_IMAGE=1
    option ROM_IMAGE_SIZE=0x1a000
    option XIP_ROM_SIZE=0x40000
    option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
    payload ../payload.elf
end

buildrom ./coreboot.rom ROM_SIZE "fallback"

# Sample config file for 
# the amd serengeti_cheetah 
# This will make a target directory of ./serengeti_cheetah

target serengeti_cheetah
mainboard amd/serengeti_cheetah

# serengeti_leopard
romimage "normal"
#       48K for SCSI FW
#        option ROM_SIZE = 475136
#       48K for SCSI FW and 48K for ATI ROM
#       option ROM_SIZE = 425984 
#       64K for Etherboot
#        option ROM_SIZE = 458752 
    option USE_FAILOVER_IMAGE=0
    option USE_FALLBACK_IMAGE=0
#	option ROM_IMAGE_SIZE=0x13800
#	option ROM_IMAGE_SIZE=0x18800
    option ROM_IMAGE_SIZE=0x20000
#	option ROM_IMAGE_SIZE=0x15800
    option XIP_ROM_SIZE=0x40000
    option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#        payload ../../../payloads/filo.zelf
#        payload ../../../payloads/tg3--filo_hda2.zelf
#	payload ../../../payloads/tg3.zelf
#	payload ../../../../payloads/tg3_vga.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga_5.4.1.zelf
#	payload ../../../../payloads/e1000_vga.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf
#	payload ../../../payloads/tg3_com2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
#	payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf
#	payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf
    payload ../payload.elf.lzma
end

romimage "fallback" 
    option USE_FAILOVER_IMAGE=0
    option USE_FALLBACK_IMAGE=1
#	option ROM_IMAGE_SIZE=0x13800
#	option ROM_IMAGE_SIZE=0x19800
    option ROM_IMAGE_SIZE=0x20000
#	option ROM_IMAGE_SIZE=0x15800
    option XIP_ROM_SIZE=0x40000
    option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#        payload ../../../payloads/filo.zelf
#        payload ../../../payloads/tg3--filo_hda2.zelf
#	payload ../../../payloads/tg3.zelf
#	payload ../../../../payloads/tg3_vga.zelf
#	payload ../../../../payloads/memtest
#	payload ../../../../payloads/adlo.elf
#	payload ../../../../payloads/e1000_vga.zelf
#	payload ../../../../payloads/filo_hda.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf
#	payload ../../../../payloads/tg3--filo_hda2_vga_5.4.1.zelf
#	payload ../../../../payloads/filo_hda2_novga.zelf
#	payload ../../../payloads/tg3_com2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
#	payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf
#	payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf
    payload ../payload.elf.lzma
end

romimage "failover"
    option USE_FAILOVER_IMAGE=1
        option USE_FALLBACK_IMAGE=0
        option ROM_IMAGE_SIZE=FAILOVER_SIZE
        option XIP_ROM_SIZE=FAILOVER_SIZE
        option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover"
end

buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover"
#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"

SimNOW V2 LAB problem

[Myles Watson]

> -----Original Message-----
> From: [e-mail] [mailto:[e-mail]]
> On Behalf Of Marc Karasek
> Sent: Tuesday, May 13, 2008 2:53 PM
> To: Ward Vandewege
> Cc: [e-mail]
> Subject: Re: [coreboot] SimNOW V2 LAB problem
>
> Ward, et all,
>
> I have completed the test builds on my 32 bit machine.   Tried Filo,
> tint, coreinfo and LAB.  All were built with the latest coreinfo code.

Yes, it fails before trying to insert the payload, so it doesn't matter
which payload you choose.
> The version (3092) assoc with the SimNOW platform build does not have
> the lxbios in the tree and fails the checkout during the build.

We should fix that, but I'm not sure where.  If you just type make again it
works, but all the util/ subdirectories are at whatever version your source
tree was before you did the checkout.
> What I have seen is that coreboot fails on final link with either
> .ram can't be allocated in segment 0
> or
> .rom can't be allocated in segment 0
>
> The only diff is the Config.lb file I used for coreboot.
>
> I have attached both files.
>
> One I had modified and the other is the original off a fresh checkout.
> (The only change was payload.elf -> payload.elf.lzma)
>
> Maybe I am doing something wrong  in configuring coreboot..

Try a different toolchain.  It's known to be broken for v2.
> Tinit & Coreinfo  both crashed on linking.  Both errors were the same:
> ld terminated with signal 11 [Segmentaion Fault]

That's strange.  They both build fine for me, even on my machine that can't
build v2.  Did you try building them for v3 to narrow down the reason?

Thanks,
Myles
> Marc
>
> Marc Karasek
> MTS
> Sun Microsystems
> mailto:[e-mail]
> ph:770.360.6415
>
> Ward Vandewege wrote:
> > On Tue, May 13, 2008 at 04:27:40PM -0400, Marc Karasek wrote:
> > > What version of binutils?
> > > The problem I am seeing on the 32 bit system seems to be a linker
>
> problem.
> > > My gcc is 4.1.2, I am leaning towards binutils,  I have 2.17.50.0.18-1
> > > 20070731.
> >
> > Aha.
> >
> > $ dpkg -l |grep binutils
> > ii  binutils                          2.16.1cvs20060117-1ubuntu2.1
> > The GNU assembler, linker and binary utiliti
> >
> > That's (a lot) older.
> >
> > Thanks,
> > Ward.

SimNOW V2 LAB problem

[Ward Vandewege]

On Tue, May 13, 2008 at 03:20:06PM -0600, Myles Watson wrote:
> > The version (3092) assoc with the SimNOW platform build does not have
> > the lxbios in the tree and fails the checkout during the build.
>
> We should fix that, but I'm not sure where.

We just need to bump up the couple boards that still use 3092 to a
more recent svn version. That'll make this problem go away.

Thanks,
Ward.

SimNOW V2 LAB problem

[Myles Watson]

> -----Original Message-----
> From: Ward Vandewege [mailto:[e-mail]]
> Sent: Tuesday, May 13, 2008 3:28 PM
> To: Myles Watson
> Cc: 'Marc Karasek'; [e-mail]
> Subject: Re: [coreboot] SimNOW V2 LAB problem
>
> On Tue, May 13, 2008 at 03:20:06PM -0600, Myles Watson wrote:
> > > The version (3092) assoc with the SimNOW platform build does not have
> > > the lxbios in the tree and fails the checkout during the build.
> >
> > We should fix that, but I'm not sure where.
>
> We just need to bump up the couple boards that still use 3092 to a
> more recent svn version. That'll make this problem go away.

Sure.  I just was wondering if it would make sense to make the svn fetch
script a little smarter.

Myles

SimNOW V2 LAB problem

[Marc Karasek]

All,

With a little input from Ward,  I think I have found out why I am seeing 
the .ram/.rom can't allocated linking problems.

It has to do with binutils.  I made a cross-compile setup for i686 with 
gcc 4.1 and binutils 2.16.  This compiles the image properly with no 
errors.

M suggestion would be to setup a cross-compile toolchain for x86 and 
then setup buildrom to use this chain.  I used crosstools to build the 
toolchain.  I have used it in the past and it is a good tool.

If we use this setup, no matter what distro someone is using we can 
always be assured what gcc/binutils/glibc version they are compiling 
coreboot with.

If you want I can help with a wiki on how to setup a cross-compile 
enviroment using the crosstools scripts.

Marc

*********************
Marc Karasek
MTS
Sun Microsystems
mailto:[e-mail]
ph:770.360.6415
*********************

Marc Karasek wrote:
> Ward, et all,
>
> I have completed the test builds on my 32 bit machine.   Tried Filo, 
> tint, coreinfo and LAB.  All were built with the latest coreinfo 
> code.  The version (3092) assoc with the SimNOW platform build does 
> not have the lxbios in the tree and fails the checkout during the build.
>
> What I have seen is that coreboot fails on final link with either
> .ram can't be allocated in segment 0
> or
> .rom can't be allocated in segment 0
>
> The only diff is the Config.lb file I used for coreboot.
>
> I have attached both files.
>
> One I had modified and the other is the original off a fresh 
> checkout.  (The only change was payload.elf -> payload.elf.lzma)
>
> Maybe I am doing something wrong  in configuring coreboot..
>
> Tinit & Coreinfo  both crashed on linking.  Both errors were the same:
> ld terminated with signal 11 [Segmentaion Fault]
>
> Marc
>
> Marc Karasek
> MTS
> Sun Microsystems
> mailto:[e-mail]
> ph:770.360.6415
>
> Ward Vandewege wrote:
> > On Tue, May 13, 2008 at 04:27:40PM -0400, Marc Karasek wrote:
> > > What version of binutils? The problem I am seeing on the 32 bit 
> > > system seems to be a linker problem. My gcc is 4.1.2, I am leaning 
> > > towards binutils,  I have 2.17.50.0.18-1 20070731.
> >
> > Aha.
> >
> > $ dpkg -l |grep binutils
> > ii  binutils                          2.16.1cvs20060117-1ubuntu2.1
> > The GNU assembler, linker and binary utiliti
> >
> > That's (a lot) older.
> >
> > Thanks,
> > Ward.

SimNOW V2 LAB problem

[Myles Watson]

> -----Original Message-----
> From: [e-mail] [mailto:[e-mail]]
> On Behalf Of Marc Karasek
> Sent: Tuesday, May 13, 2008 3:26 PM
> To: Marc Karasek
> Cc: Ward Vandewege; [e-mail]
> Subject: Re: [coreboot] SimNOW V2 LAB problem
>
> All,
>
> With a little input from Ward,  I think I have found out why I am seeing
> the .ram/.rom can't allocated linking problems.
>
> It has to do with binutils.  I made a cross-compile setup for i686 with
> gcc 4.1 and binutils 2.16.  This compiles the image properly with no
> errors.

Does it also compile qemu correctly?  That was the reason I "upgraded".

Thanks,
Myles
> M suggestion would be to setup a cross-compile toolchain for x86 and
> then setup buildrom to use this chain.  I used crosstools to build the
> toolchain.  I have used it in the past and it is a good tool.
>
> If we use this setup, no matter what distro someone is using we can
> always be assured what gcc/binutils/glibc version they are compiling
> coreboot with.
>
> If you want I can help with a wiki on how to setup a cross-compile
> enviroment using the crosstools scripts.
>
> Marc
>
> Marc Karasek
> MTS
> Sun Microsystems
> mailto:[e-mail]
> ph:770.360.6415
>
> Marc Karasek wrote:
> > Ward, et all,
> >
> > I have completed the test builds on my 32 bit machine.   Tried Filo,
> > tint, coreinfo and LAB.  All were built with the latest coreinfo
> > code.  The version (3092) assoc with the SimNOW platform build does
> > not have the lxbios in the tree and fails the checkout during the build.
> >
> > What I have seen is that coreboot fails on final link with either
> > .ram can't be allocated in segment 0
> > or
> > .rom can't be allocated in segment 0
> >
> > The only diff is the Config.lb file I used for coreboot.
> >
> > I have attached both files.
> >
> > One I had modified and the other is the original off a fresh
> > checkout.  (The only change was payload.elf -> payload.elf.lzma)
> >
> > Maybe I am doing something wrong  in configuring coreboot..
> >
> > Tinit & Coreinfo  both crashed on linking.  Both errors were the same:
> > ld terminated with signal 11 [Segmentaion Fault]
> >
> > Marc
> >
> > Marc Karasek
> > MTS
> > Sun Microsystems
> > mailto:[e-mail]
> > ph:770.360.6415
> >
> > Ward Vandewege wrote:
> > > On Tue, May 13, 2008 at 04:27:40PM -0400, Marc Karasek wrote:
> > > > What version of binutils? The problem I am seeing on the 32 bit
> > > > system seems to be a linker problem. My gcc is 4.1.2, I am leaning
> > > > towards binutils,  I have 2.17.50.0.18-1 20070731.
> > >
> > > Aha.
> > >
> > > $ dpkg -l |grep binutils
> > > ii  binutils                          2.16.1cvs20060117-1ubuntu2.1
> > > The GNU assembler, linker and binary utiliti
> > >
> > > That's (a lot) older.
> > >
> > > Thanks,
> > > Ward.