HacKurx [mailto:hackurx@gmail.com] wrote:
]> David wrote: ]> It would still be helpful if you can post the details for this stick. ]1 Corsair CMV4GX3M1A1333C9 (4Gb & 1,5 Volt) ]http://www.ldlc.com/fiche/PB00104214.html ] ]> You may also want to post the output of "git diff" for others who may want to try Richland on the F2A85-]M. ]Ok, no problem :) ]http://pastebin.com/sTFzE5YN ] ]> Scott wrote: ]> you could try adding your cupid to the list ]One more step :) ]http://pastebin.com/kD2zmbua
It looks like the wrong file was modified. That probably causes Orochi code to be used instead of Trinity as desired. Only change the one file in the family15tn directory:
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index f396201..1dbc064 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -123,6 +123,7 @@ static struct device_operations cpu_dev_ops = {
static struct cpu_device_id cpu_table[] = { { X86_VENDOR_AMD, 0x610f00 }, /* TN-A0 */ + { X86_VENDOR_AMD, 0x610f31 }, /* RL-A1 (HACK) */ { 0, 0 }, };
Here is an optional change. That first hack that changes == to != is quite unreadable and confusing. I believe the following is a better solution. Also remember that running Trinity agesa on Richland is a hack and hopefully a temporary solution. Possible problems are: 1) desired microcode patch is not available 2) Any Richland errata workarounds embedded in the agesa code are not present 3) There might be some differences between Trinity and Richland recommended register settings.
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c index 8157b57..bfcaa9a 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c @@ -86,6 +86,12 @@ STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA CpuF15TnLogicalIdAndRevArray[] = 0x6101, AMD_F15_TN_A1 }, + + { // HACK: let Richland run Trinity agesa code + 0x6131, + AMD_F15_TN_A1 + }, + { 0x6100, 0x0000000000000100ull
]Thanks, ] ]2014-02-26 23:20 GMT+01:00 Scott Duplichan scott@notabs.org: ]> HacKurx [mailto:hackurx@gmail.com] wrote: ]> ]> ]> David wrote: ]> ]> With just 1 stick in the A1 slot, please post a pastebin of the console ]> ]> output. ]> ] ]> ]Perfect! It is perfectly detailed, the cpu is not recognized: ]> ]http://pastebin.com/2Lbew82b ]> ]> you could try adding your cupid to the list in ]> src/cpu/amd/agesa/family15tn/model_15_init.c: ]> ]> static struct cpu_device_id cpu_table[] = { ]> { X86_VENDOR_AMD, 0x610f00 }, /* TN-A0 */ ]> { X86_VENDOR_AMD, 0x610f31 }, /* RL-A1 */ ]> { 0, 0 }, ]> }; ]> Thanks, ]> Scott ]> ]> ]> ]Thanks, best regards, ] ]-- ]Best regards, ] ]HacKurx ]www.hackurx.info
Scott wrote: diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c index 8157b57..bfcaa9a 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c @@ -86,6 +86,12 @@ STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA CpuF15TnLogicalIdAndRevArray[] = 0x6101, AMD_F15_TN_A1 },
- { // HACK: let Richland run Trinity agesa code
- 0x6131,
- AMD_F15_TN_A1
- },
- { 0x6100, 0x0000000000000100ull
Perfect! It works, thank you very much!
Coreboot log: http://pastebin.com/B0Z1bTQu
Diff (I used CROSSGCC 1.23 because CROSSGCC 1.24 can not be compil on my system - Debian Wheezy amd64) : http://pastebin.com/nbt0JmqN
My config file : http://pastebin.com/zJLQPkgX
My CPU seems a little slower but it works :) It remains only to integrate this into the wiki and coreboot, I know that I can count on you ;)
From my side I will continue my tests. Thank you everybody, best regards.