New patch to review for coreboot: 29cadf1 i945: Reset IGD on boot

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1178

-gerrit

commit 29cadf18204929842781120325b7301e6dbe1612
Author: Patrick Georgi 
Date:   Fri Jul 6 11:31:39 2012 +0200

i945: Reset IGD on boot

This is mostly necessary for reboot, but it doesn't hurt the boot process.
    On reboot explicitely reset the integrated graphics, otherwise the VGABIOS
    might not be able to reinitialize it properly, and you either have a still
    of the last pre-reboot image, garbage or an empty screen, but no text-mode.

Change-Id: Ic3d6932fbaf720d88daaac7e4b09c3c0b9f0b0e2
    Signed-off-by: Patrick Georgi 
---
 src/northbridge/intel/i945/gma.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 340ddcd..b703a80 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -18,15 +18,25 @@
  */

#include <console/console.h>
+#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <pc80/mc146818rtc.h>

+#define GDRST 0xc0
+
 static void gma_func0_init(struct device *dev)
 {
    u32 reg32;

+	/* Unconditionally reset graphics */
+	pci_write_config8(dev, GDRST, 1);
+	udelay(50);
+	pci_write_config8(dev, GDRST, 0);
+	/* wait for device to finish */
+	while (pci_read_config8(dev, GDRST) & 1) { };
+
    /* IGD needs to be Bus Master */
    reg32 = pci_read_config32(dev, PCI_COMMAND);
    pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);