Top 256 bytes in ROM for Nvidia

[Carl-Daniel Hailfinger]

Hi Yinghai,

is there any public information about the usage of the top 256 bytes in
ROM for Nvidia chipsets? The only information I found was
http://coreboot.org/pipermail/coreboot/2005-November/012918.html but
that does not explain the reasons or give me a memory map.
I'm looking at this diff and wonder if 0x80 is the only possible
location for ID information in the ROM.

--- ./src/arch/i386/lib/id.lds	2007-12-30 01:04:02.000000000 +0100
+++ ./src/southbridge/nvidia/ck804/id.lds	2007-12-30 01:04:06.000000000 +0100
@@ -1,5 +1,5 @@
 SECTIONS {
-	. = (_ROMBASE + ROM_IMAGE_SIZE - 0x10) - (__id_end - __id_start);
+	. = (_ROMBASE + ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start);
    .id (.): {
    	*(.id)
    }

Regards,
Carl-Daniel

[yhlu]

On Fri, Jul 4, 2008 at 6:17 PM, Carl-Daniel Hailfinger
 wrote:
> Hi Yinghai,
>
> is there any public information about the usage of the top 256 bytes in
> ROM for Nvidia chipsets? The only information I found was
> http://coreboot.org/pipermail/coreboot/2005-November/012918.html but
> that does not explain the reasons or give me a memory map.
> I'm looking at this diff and wonder if 0x80 is the only possible
> location for ID information in the ROM.
>
> --- ./src/arch/i386/lib/id.lds  2007-12-30 01:04:02.000000000 +0100
> +++ ./src/southbridge/nvidia/ck804/id.lds       2007-12-30 01:04:06.000000000 +0100
> @@ -1,5 +1,5 @@
>  SECTIONS {
>   . = (_ROMBASE + ROM_IMAGE_SIZE - 0x10) - (__id_end - __id_start);
>   . = (_ROMBASE + ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start);
>  .id (.): {
>          *(.id)
>  }

just need to leave some space below  -0x10

YH