Problem with PLL

[Uwe Schwarz]

Hi,

I'm trying to boot coreboot v2 on a AMD db800 (Geode LX) Board. Around  
30% of my boots it keeps freezing right after "Configuring PLL" during  
pll_reset.

Is there anything I could try to figure out why it's doing that?

// Uwe

[Marc Jones]

Uwe Schwarz wrote:
> Hi,
>
> I'm trying to boot coreboot v2 on a AMD db800 (Geode LX) Board. Around  
> 30% of my boots it keeps freezing right after "Configuring PLL" during  
> pll_reset.
>
> Is there anything I could try to figure out why it's doing that?
>
> // Uwe

Uwe,
Failing sometimes may mean that there is a hardware problem but here are 
some things you can check.

What is the port80 code when it fails?

Can you narrow down the line that fails, northbridge\amd\lx\pll_reset.c?

If it fails in the reset you can try making the pll lock time longer but 
I doubt that it will help.
msrGlcpSysRstpll.lo |= (0xFF << RSTPPL_LOWER_HOLD_COUNT_SHIFT);

You can check the GLCP_SYS_RSTPLL value that is being set.

Marc

[Uwe Schwarz]

Hi Marc,
> Can you narrow down the line that fails, northbridge\amd\lx 
> \pll_reset.c?

It failed at this line:
wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
> If it fails in the reset you can try making the pll lock time longer  
> but
> I doubt that it will help.
> msrGlcpSysRstpll.lo |= (0xFF << RSTPPL_LOWER_HOLD_COUNT_SHIFT);

and that did the trick. It does boot now, thanks for helping.

// Uwe

[Peter Stuge]

On Wed, Jun 04, 2008 at 01:30:52PM +0200, Uwe Schwarz wrote:
> > If it fails in the reset you can try making the pll lock time
> > longer but I doubt that it will help.
> > msrGlcpSysRstpll.lo |= (0xFF << RSTPPL_LOWER_HOLD_COUNT_SHIFT);
>
> and that did the trick.

What is this indicative of?

Some clock quality parameter?

//Peter