Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets.
This fixes status register writes on almost all ICH+VIA SPI masters.
The fix is almost identical to r484, but this time it affects the EWSR (Enable Write Status Register) opcode instead of the WREN (Write Enable) opcode.
With the differentiated return codes introduced in r500, the workaround is more precise this time. The old WREN workaround was updated as well.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-spi_wren_ewsr_error_checking_ichspi_workaround/spi.c =================================================================== --- flashrom-spi_wren_ewsr_error_checking_ichspi_workaround/spi.c (Revision 505) +++ flashrom-spi_wren_ewsr_error_checking_ichspi_workaround/spi.c (Arbeitskopie) @@ -116,8 +116,10 @@
/* Send WREN (Write Enable) */ result = spi_command(sizeof(cmd), 0, cmd, NULL); - if (result) { - printf_debug("spi_write_enable failed"); + + if (result) + printf_debug("%s failed", __func__); + if (result == SPI_INVALID_OPCODE) { switch (flashbus) { case BUS_TYPE_ICH7_SPI: case BUS_TYPE_ICH9_SPI: @@ -126,9 +128,12 @@ " and hoping it will be run as PREOP\n"); return 0; default: - printf_debug("\n"); + break; } } + if (result) + printf_debug("\n"); + return result; }
@@ -555,9 +560,29 @@ int spi_write_status_enable(void) { const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; + int result;
/* Send EWSR (Enable Write Status Register). */ - return spi_command(JEDEC_EWSR_OUTSIZE, JEDEC_EWSR_INSIZE, cmd, NULL); + result = spi_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); + + if (result) + printf_debug("%s failed", __func__); + if (result == SPI_INVALID_OPCODE) { + switch (flashbus) { + case BUS_TYPE_ICH7_SPI: + case BUS_TYPE_ICH9_SPI: + case BUS_TYPE_VIA_SPI: + printf_debug(" due to SPI master limitation, ignoring" + " and hoping it will be run as PREOP\n"); + return 0; + default: + break; + } + } + if (result) + printf_debug("\n"); + + return result; }
/*
Carl-Daniel Hailfinger wrote:
Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets.
Acked-by: FENG Yu Ning fengyuning1984@gmail.com
iirc, Rudolf came to similar solution before, and I tried to hold it back. That might be a wrong decision.
I still don't like that much. However, I realize that personal taste is a bad reason to hold back a workaround for a long time. I don't want to make a wrong decision once more.
It seems not many are interested in it. Here is my ack.
yu ning
On Thu, 2009-05-14 at 22:51 +0800, FENG Yu Ning wrote:
Carl-Daniel Hailfinger wrote:
Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets.
Acked-by: FENG Yu Ning fengyuning1984@gmail.com
iirc, Rudolf came to similar solution before, and I tried to hold it back. That might be a wrong decision.
I still don't like that much. However, I realize that personal taste is a bad reason to hold back a workaround for a long time. I don't want to make a wrong decision once more.
It seems not many are interested in it. Here is my ack.
yu ning
Tested and works on real hardware - Asus M2V-MX-SE with SST SST25VF032B" (4096 KB) SPI flash
Acked-by: Cristi Magherusan cristi.magherusan@net.utcluj.ro
Thanks! Cristi
On 15.05.2009 02:45, Cristi Magherusan wrote:
On Thu, 2009-05-14 at 22:51 +0800, FENG Yu Ning wrote:
Carl-Daniel Hailfinger wrote:
Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets.
Acked-by: FENG Yu Ning fengyuning1984@gmail.com
iirc, Rudolf came to similar solution before, and I tried to hold it back. That might be a wrong decision.
I still don't like that much. However, I realize that personal taste is a bad reason to hold back a workaround for a long time. I don't want to make a wrong decision once more.
I'm not too happy about the workaround either. The SPI layer needs some design changes in the future to better handle this.
It seems not many are interested in it. Here is my ack.
yu ning
Tested and works on real hardware - Asus M2V-MX-SE with SST SST25VF032B" (4096 KB) SPI flash
Acked-by: Cristi Magherusan cristi.magherusan@net.utcluj.ro
Thank you both for reviewing!
Committed in r514.
Regards, Carl-Daniel