Hello,
I have a problem with my ThinkPad X201 (nehalem)
I have two sticks of Samsung 4GB 2Rx8 PC3-10600S (1333MHz) When i use only one of them in one of the two slots, the computer boots fine, but when i use both of them in the two slots, the computer doesn't boot, the screen doens't even turn on.
I dumped the logs via EHCI but they seem normal, in fact both the working combination and the broken one make 34 or so iterations of Timings dumping, but then the working conf. start booting, while the broken one freezes without printing error messages on the EHCI.
I have tried adding more `printk` calls in `src/northbridge/intel/nehalem/raminit.c` but ended up in a brick, probably because i slowed down the initialization too much.
I attach three EHCI logs: - the first stick in the first slot: working - the second stick in the second slot: working - both stick inserted: not working
Also i find difficult to understand the code in `raminit.c` of nehalem because it lacks almost completely of comments, with respect to raminit.c of sandybridge for example.
Hello Federico,
I would like to suggest one quick probe: to reprogram your flash with Nehalem's true BIOS, and see if use case with both DDRAMs' are going to bring OS (whatever it is, assuming Linux) up. This can give to you two possibilities: [1] Both DDRAMs with BIOS work (then you have problem with sort of sync with Nehalem's `src/northbridge/intel/nehalem/raminit.c` in Coreboot); [2] Both DDRAMs with BIOS do not work (then problem is most likely NOT with Coreboot).
Then we can go further... My two cent ad-hoc approach! ;-)
Zoran
On Tue, Nov 22, 2016 at 1:35 PM, Federico Amedeo Izzo < federico.izzo42@gmail.com> wrote:
Hello,
I have a problem with my ThinkPad X201 (nehalem)
I have two sticks of Samsung 4GB 2Rx8 PC3-10600S (1333MHz) When i use only one of them in one of the two slots, the computer boots fine, but when i use both of them in the two slots, the computer doesn't boot, the screen doens't even turn on.
I dumped the logs via EHCI but they seem normal, in fact both the working combination and the broken one make 34 or so iterations of Timings dumping, but then the working conf. start booting, while the broken one freezes without printing error messages on the EHCI.
I have tried adding more `printk` calls in `src/northbridge/intel/nehalem/raminit.c` but ended up in a brick, probably because i slowed down the initialization too much.
I attach three EHCI logs:
- the first stick in the first slot: working
- the second stick in the second slot: working
- both stick inserted: not working
Also i find difficult to understand the code in `raminit.c` of nehalem because it lacks almost completely of comments, with respect to raminit.c of sandybridge for example.
-- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
On Tue, Nov 22, 2016 at 3:35 PM, Federico Amedeo Izzo federico.izzo42@gmail.com wrote:
Hello,
I have a problem with my ThinkPad X201 (nehalem)
I have two sticks of Samsung 4GB 2Rx8 PC3-10600S (1333MHz) When i use only one of them in one of the two slots, the computer boots fine, but when i use both of them in the two slots, the computer doesn't boot, the screen doens't even turn on.
I dumped the logs via EHCI but they seem normal, in fact both the working combination and the broken one make 34 or so iterations of Timings dumping, but then the working conf. start booting, while the broken one freezes without printing error messages on the EHCI.
I have tried adding more `printk` calls in `src/northbridge/intel/nehalem/raminit.c` but ended up in a brick, probably because i slowed down the initialization too much.
I attach three EHCI logs:
- the first stick in the first slot: working
- the second stick in the second slot: working
- both stick inserted: not working
Also i find difficult to understand the code in `raminit.c` of nehalem because it lacks almost completely of comments, with respect to raminit.c of sandybridge for example.
I`ve seen simular issue on my x201(t), the workaround could be a hardcoded SPD limitation from above for memory clock speed. Using different memory sticks (Kingstons rather than Samsungs) is 'solving' problem as well. I`ve not paid necessary attention to the problem at the time, so if you have some spare cycles, you could possibly want to figure out right SPD settings. The simplest way is to use decode-dimms from i2c-tools or CPU-z and to compare vendor`s settings with single- and dual-dimm setups and coreboot`s with a single dimm.