USB coreboot-4.5-144-g7d9068f-6QET70WW (1.40) Sun Nov 6 17:14:29 UTC 2016 romstage starting... PM1_CNT: 00000000 SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 Intel ME early init Intel ME firmware is ready ME: Requested 32MB UMA SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fec0 size 10000 find_current_mrc_cache_local: picked entry 4 from cache block reg2ca9_bit0 = 0 reg274265[0][0] = 5 reg274265[0][1] = 5 reg274265[0][2] = e reg274265[1][0] = 5 reg274265[1][1] = 5 reg274265[1][2] = e [6dc] <= 23faff [6e8] <= 23faff USB coreboot-4.5-144-g7d9068f-6QET70WW (1.40) Sun Nov 6 17:14:29 UTC 2016 romstage starting... PM1_CNT: 00000000 SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 Intel ME early init Intel ME firmware is ready ME: Requested 32MB UMA SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fec0 size 10000 find_current_mrc_cache_local: picked entry 4 from cache block Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 6b (76) 60 (60) 7c (7c) lane 1: 20 (20) 62 (6d) 5b (5b) 79 (79) lane 2: 20 (20) 72 (7d) 74 (74) 92 (92) lane 3: 20 (20) 50 (5b) 4a (4a) 69 (69) lane 4: 20 (20) ba (c5) a9 (a9) c5 (c5) lane 5: 20 (20) 98 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) b0 (bb) 97 (97) b4 (b4) lane 7: 20 (20) b0 (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 6a (75) 5d (5d) 7a (7a) lane 1: 20 (20) 61 (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 72 (7d) 72 (72) 90 (90) lane 3: 20 (20) 50 (5b) 4a (4a) 68 (68) lane 4: 20 (20) ba (c5) a8 (a8) c5 (c5) lane 5: 20 (20) 97 (a2) 7b (7b) 99 (99) lane 6: 20 (20) af (ba) 95 (95) b2 (b2) lane 7: 20 (20) af (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 38 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 76 (76) 60 (60) 7c (7c) lane 1: 20 (20) 6d (6d) 5b (5b) 79 (79) lane 2: 20 (20) 7d (7d) 74 (74) 92 (92) lane 3: 20 (20) 5b (5b) 4a (4a) 69 (69) lane 4: 20 (20) c5 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 20 (20) 6d (6d) 5b (5b) 79 (79) lane 2: 20 (20) 7d (7d) 74 (74) 92 (92) lane 3: 20 (20) 5b (5b) 4a (4a) 69 (69) lane 4: 20 (20) c5 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 20 (20) 7d (7d) 74 (74) 92 (92) lane 3: 20 (20) 5b (5b) 4a (4a) 69 (69) lane 4: 20 (20) c5 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 20 (20) 5b (5b) 4a (4a) 69 (69) lane 4: 20 (20) c5 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 20 (20) c5 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 20 (20) a3 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 20 (20) bb (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 20 (20) bb (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 20 (20) 75 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 20 (20) 6c (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 20 (20) 7d (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 20 (20) 5b (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 68 (68) lane 4: 20 (20) c5 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 68 (68) lane 4: 13 (20) b8 (c5) a8 (a8) c5 (c5) lane 5: 20 (20) a2 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 68 (68) lane 4: 13 (20) b8 (c5) a8 (a8) c5 (c5) lane 5: 12 (20) 94 (a2) 7b (7b) 99 (99) lane 6: 20 (20) ba (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 79 (79) lane 2: 13 (20) 70 (7d) 74 (74) 92 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 69 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c5 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 68 (68) lane 4: 13 (20) b8 (c5) a8 (a8) c5 (c5) lane 5: 12 (20) 94 (a2) 7b (7b) 99 (99) lane 6: 11 (20) ab (ba) 95 (95) b2 (b2) lane 7: 20 (20) ba (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 80 (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 7b (79) lane 2: 13 (20) 70 (7d) 74 (74) 94 (92) lane 3: 12 (20) 4d (5b) 4a (4a) 6a (69) lane 4: 13 (20) b8 (c5) a9 (a9) c9 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9d (9a) lane 6: 10 (20) ab (bb) 97 (97) b7 (b4) lane 7: 11 (20) ac (bb) 89 (89) a9 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7a (7a) lane 2: 15 (20) 72 (7d) 72 (72) 90 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 68 (68) lane 4: 13 (20) b8 (c5) a8 (a8) c5 (c5) lane 5: 12 (20) 94 (a2) 7b (7b) 99 (99) lane 6: 11 (20) ab (ba) 95 (95) b2 (b2) lane 7: 12 (20) ac (ba) 87 (87) a4 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 12 (20) 68 (76) 60 (60) 7c (7c) lane 1: 12 (20) 5f (6d) 5b (5b) 77 (79) lane 2: 13 (20) 70 (7d) 74 (74) 8f (92) lane 3: 12 (20) 4d (5b) 4a (4a) 67 (69) lane 4: 13 (20) b8 (c5) a9 (a9) c4 (c5) lane 5: 13 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 10 (20) ab (bb) 97 (97) b4 (b4) lane 7: 11 (20) ac (bb) 89 (89) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 12 (20) 67 (75) 5d (5d) 7d (7a) lane 1: 12 (20) 5e (6c) 5c (5c) 7c (7a) lane 2: 15 (20) 72 (7d) 72 (72) 92 (90) lane 3: 12 (20) 4d (5b) 4a (4a) 6a (68) lane 4: 13 (20) b8 (c5) a8 (a8) c8 (c5) lane 5: 12 (20) 94 (a2) 7b (7b) 9b (99) lane 6: 11 (20) ab (ba) 95 (95) b5 (b2) lane 7: 12 (20) ac (ba) 87 (87) a7 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 5 (20) 68 (76) 60 (60) 7c (7c) lane 1: 5 (20) 5f (6d) 5b (5b) 77 (79) lane 2: 6 (20) 70 (7d) 74 (74) 8f (92) lane 3: 5 (20) 4d (5b) 4a (4a) 67 (69) lane 4: 6 (20) b8 (c5) a9 (a9) c4 (c5) lane 5: 6 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 3 (20) ab (bb) 97 (97) b4 (b4) lane 7: 4 (20) ac (bb) 89 (89) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 5 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 5 (20) 5e (6c) 5c (5c) 78 (7a) lane 2: 8 (20) 72 (7d) 72 (72) 8d (90) lane 3: 5 (20) 4d (5b) 4a (4a) 67 (68) lane 4: 6 (20) b8 (c5) a8 (a8) c3 (c5) lane 5: 5 (20) 94 (a2) 7b (7b) 98 (99) lane 6: 4 (20) ab (ba) 95 (95) b2 (b2) lane 7: 5 (20) ac (ba) 87 (87) a2 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 1 (0) Timings: channel 0, slot 0, rank 0 lane 0: 5 (20) 68 (76) 60 (60) 7c (7c) lane 1: 5 (20) 5f (6d) 5b (5b) 77 (79) lane 2: 6 (20) 70 (7d) 74 (74) 8f (92) lane 3: 5 (20) 4d (5b) 4a (4a) 67 (69) lane 4: 6 (20) b8 (c5) a9 (a9) c4 (c5) lane 5: 6 (20) 96 (a3) 7d (7d) 9a (9a) lane 6: 3 (20) ab (bb) 97 (97) b4 (b4) lane 7: 4 (20) ac (bb) 89 (89) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 0, slot 0, rank 1 lane 0: 5 (20) 67 (75) 5d (5d) 7a (7a) lane 1: 5 (20) 5e (6c) 5c (5c) 78 (7a) lane 2: 8 (20) 72 (7d) 72 (72) 8d (90) lane 3: 5 (20) 4d (5b) 4a (4a) 67 (68) lane 4: 6 (20) b8 (c5) a8 (a8) c3 (c5) lane 5: 5 (20) 94 (a2) 7b (7b) 98 (99) lane 6: 4 (20) ab (ba) 95 (95) b2 (b2) lane 7: 5 (20) ac (ba) 87 (87) a2 (a4) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 1 (0) CBMEM: IMD: root @ bf7ff000 254 entries. IMD: root @ bf7fec00 62 entries. [6dc] = 23faff [6e8] = 23faff Relocate MRC DATA from ff7fefe0 to bf7dc000 (1472 bytes) ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : uKernel Phase ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Unknown 0x00 TPM initialization. TPM: Init Found TPM ST33ZP24 by ST Microelectronics TPM: Open TPM: Startup TPM: command 0x99 returned 0x0 TPM: OK. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 2ff00 size 156ae USB coreboot-4.5-144-g7d9068f-6QET70WW (1.40) Sun Nov 6 17:14:29 UTC 2016 ramstage starting... Moving GDT to bf7fe7c0...ok Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 PNP: 00ff.1: enabled 1 PNP: 00ff.2: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 164e.3: enabled 1 PNP: 164e.2: enabled 0 PNP: 164e.7: enabled 0 PNP: 164e.19: enabled 0 PNP: 0c31.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 Compare with tree... Root Device: enabled 1 PNP: 00ff.1: enabled 1 PNP: 00ff.2: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 164e.3: enabled 1 PNP: 164e.2: enabled 0 PNP: 164e.7: enabled 0 PNP: 164e.19: enabled 0 PNP: 0c31.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 ... pmbase = 0x0500 Root Device scanning... root_dev_scan_bus for Root Device CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 PNP: 00ff.1 enabled recv_ec_data: 0x36 recv_ec_data: 0x51 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x34 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x12 recv_ec_data: 0x03 recv_ec_data: 0x50 recv_ec_data: 0x11 EC Firmware ID 6QHT34WW-3.18, Version 5.01B CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0x00 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0x20 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0x20 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0x00 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0xa6 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0xa6 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 recv_ec_data: 0x60 recv_ec_data: 0x10 dock is not connected PNP: 00ff.2 enabled CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0044] ops Normal boot. PCI: 00:00.0 [8086/0044] enabled Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 PCI: 00:01.0 subordinate bus PCI Express PCI: 00:01.0 [8086/0045] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/0046] enabled PCI: 00:16.0 [8086/0000] ops PCI: 00:16.0 [8086/3b64] enabled PCI: Static device PCI: 00:16.2 not found, disabling it. PCI: 00:19.0 [8086/10ea] enabled PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/3b3c] enabled PCI: 00:1b.0 [8086/0000] ops PCI: 00:1b.0 [8086/3b56] enabled Capability: type 0x10 @ 0x40 Capability: type 0x05 @ 0x80 Capability: type 0x0d @ 0x90 Capability: type 0x01 @ 0xa0 Capability: type 0x10 @ 0x40 PCI: 00:1c.0 subordinate bus PCI Express PCI: 00:1c.0 [8086/3b42] enabled Capability: type 0x10 @ 0x40 Capability: type 0x05 @ 0x80 Capability: type 0x0d @ 0x90 Capability: type 0x01 @ 0xa0 Capability: type 0x10 @ 0x40 PCI: 00:1c.1 subordinate bus PCI Express PCI: 00:1c.1 [8086/3b44] enabled Capability: type 0x10 @ 0x40 Capability: type 0x05 @ 0x80 Capability: type 0x0d @ 0x90 Capability: type 0x01 @ 0xa0 Capability: type 0x10 @ 0x40 PCI: 00:1c.3 subordinate bus PCI Express PCI: 00:1c.3 [8086/3b48] enabled Capability: type 0x10 @ 0x40 Capability: type 0x05 @ 0x80 Capability: type 0x0d @ 0x90 Capability: type 0x01 @ 0xa0 Capability: type 0x10 @ 0x40 PCI: 00:1c.4 subordinate bus PCI Express PCI: 00:1c.4 [8086/3b4a] enabled PCI: 00:1d.0 [8086/0000] ops PCI: 00:1d.0 [8086/3b34] enabled PCI: 00:1e.0 [8086/2448] bus ops PCI: 00:1e.0 [8086/2448] enabled PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/3b07] enabled PCI: 00:1f.2 [8086/0000] ops CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 PCI: 00:1f.2 [8086/3b2e] enabled PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/3b30] enabled PCI: 00:1f.6 [8086/0000] ops PCI: 00:1f.6 [8086/3b32] enabled PCI: 00:01.0 scanning... do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 scan_bus: scanning of bus PCI: 00:01.0 took 3268 usecs PCI: 00:1c.0 scanning... do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 02 scan_bus: scanning of bus PCI: 00:1c.0 took 3270 usecs PCI: 00:1c.1 scanning... do_pci_scan_bridge for PCI: 00:1c.1 PCI: pci_scan_bus for bus 03 scan_bus: scanning of bus PCI: 00:1c.1 took 3270 usecs PCI: 00:1c.3 scanning... do_pci_scan_bridge for PCI: 00:1c.3 PCI: pci_scan_bus for bus 04 scan_bus: scanning of bus PCI: 00:1c.3 took 3276 usecs PCI: 00:1c.4 scanning... do_pci_scan_bridge for PCI: 00:1c.4 PCI: pci_scan_bus for bus 05 PCI: 05:00.0 [8086/08b3] enabled Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0x40 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L1 scan_bus: scanning of bus PCI: 00:1c.4 took 10637 usecs PCI: 00:1e.0 scanning... do_pci_scan_bridge for PCI: 00:1e.0 PCI: pci_scan_bus for bus 06 scan_bus: scanning of bus PCI: 00:1e.0 took 3282 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 PNP: 164e.3 enabled PNP: 164e.2 disabled PNP: 164e.7 disabled PNP: 164e.19 disabled PNP: 0c31.0 enabled scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 6998 usecs PCI: 00:1f.3 scanning... scan_smbus for PCI: 00:1f.3 smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled scan_smbus for PCI: 00:1f.3 done scan_bus: scanning of bus PCI: 00:1f.3 took 15247 usecs scan_bus: scanning of bus DOMAIN: 0000 took 141117 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 220737 usecs done BS: BS_DEV_ENUMERATE times (us): entry 0 run 288236 exit 0 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 PNP: 00ff.1 missing read_resources PNP: 00ff.2 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 ram_before_4g_top: 0xbf800000 TOUUD: 0x1340 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:1a.0 EHCI BAR hook registered PCI: 00:1c.0 read_resources bus 2 link: 0 PCI: 00:1c.0 read_resources bus 2 link: 0 done PCI: 00:1c.1 read_resources bus 3 link: 0 PCI: 00:1c.1 read_resources bus 3 link: 0 done PCI: 00:1c.3 read_resources bus 4 link: 0 PCI: 00:1c.3 read_resources bus 4 link: 0 done PCI: 00:1c.4 read_resources bus 5 link: 0 PCI: 00:1c.4 read_resources bus 5 link: 0 done More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 PCI: 00:1e.0 read_resources bus 6 link: 0 PCI: 00:1e.0 read_resources bus 6 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.3 read_resources bus 1 link: 0 PCI: 00:1f.3 read_resources bus 1 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 PNP: 00ff.1 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 PCI: 00:00.0 resource base c0000 size bf740000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c1c00000 size 400000 align 0 gran 0 limit 0 flags f0000200 index 6 PCI: 00:00.0 resource base c2000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:00.0 resource base 100000000 size 34000000 align 0 gran 0 limit 0 flags e0004200 index 8 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index b PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d PCI: 00:01.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18 PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.2 PCI: 00:19.0 PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.1 PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.3 PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.4 child on link 0 PCI: 05:00.0 PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 05:00.0 PCI: 05:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 PCI: 00:1d.0 PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1e.0 PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1f.0 child on link 0 PNP: 164e.3 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PCI: 00:1f.0 resource base 1680 size 1c align 0 gran 0 limit 0 flags c0040100 index 10000400 PNP: 164e.3 PNP: 164e.3 resource base 200 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 164e.3 resource base b0 size 0 align 0 gran 0 limit 0 flags c0000400 index 29 PNP: 164e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 164e.3 resource base 82 size 0 align 0 gran 0 limit 0 flags c0000400 index f0 PNP: 164e.2 PNP: 164e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 164e.7 PNP: 164e.7 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60 PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 164e.19 PNP: 164e.19 resource base 0 size 2 align 1 gran 1 limit ffff flags 100 index 60 PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:1f.2 PCI: 00:1f.2 rPCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1e.0 prefmem: base: 0 size: 0 align: PCI: 00:19.0 10 * [0x500000 - 0x51ffff] mem PCI: 00:1b.0 10 * [0x520000 - 0x523fff] mem PCI: 00:19.0 14 * [0x524000 - 0x524fff] mem PCI: 00:1f.6 10 * [0x525000 - 0x525fff] mem PCI: 00:1f.2 24 * [0x526000 - 0x5267ff] mem PCI: 00:1a.0 10 * [0x527000 - 0x5273ff] mem PCI: 00:1d.0 10 * [0x528000 - 0x5283ff] mem PCI: 00:1f.3 10 * [0x529000 - 0x5290ff] mem PCI: 00:16.0 10 * [0x52a000 - 0x52a00f] mem DOMAIN: 0000 mem: base: 52a010 size: 52a010 align: 22 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed) constrain_resources: PCI: 00:00.0 04 base 000c0000 limit bf7fffff mem (fixed) constrain_resources: PCI: 00:00.0 05 base bf800000 limit bfffffff mem (fixed) constrain_resources: PCI: 00:00.0 06 base c1c00000 limit c1ffffff mem (fixed) constrain_resources: PCI: 00:00.0 07 base c2000000 limit c3ffffff mem (fixed) constrain_resources: PCI: 00:00.0 0a base e0000000 limit efffffff mem (fixed) constrain_resources: PCI: 00:02.0 18 base d0000000 limit dfffffff prefmem (fixed) constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) constrain_resources: PCI: 00:1f.0 10000400 base 00001680 limit 0000169b io (fixed) skipping PNP: 164e.3@29 fixed resource, size=0! skipping PNP: 164e.3@f0 fixed resource, size=0! avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000169c limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base cf800000 limit cfffffff Setting resources... DOMAIN: 0000 io: base:169c size:60 align:5 gran:0 limit:ffff PCI: 00:19.0 18 * [0x1800 - 0x181f] io PCI: 00:1f.2 20 * [0x1820 - 0x183f] io PCI: 00:02.0 20 * [0x1840 - 0x1847] io PCI: 00:1f.2 10 * [0x1848 - 0x184f] io PCI: 00:1f.2 18 * [0x1850 - 0x1857] io PCI: 00:1f.2 14 * [0x1858 - 0x185b] io PCI: 00:1f.2 1c * [0x185c - 0x185f] io DOMAIN: 0000 io: next_base: 1860 size: 60 align: 5 gran: 0 done PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.4 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.4 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done DOMAIN: 0000 mem: base:cf800000 size:52a010 align:22 gran:0 limit:cfffffff PCI: 00:02.0 10 * [0xcf800000 - 0xcfbfffff] mem PCI: 00:1c.4 20 * [0xcfc00000 - 0xcfcfffff] mem PCI: 00:19.0 10 * [0xcfd00000 - 0xcfd1ffff] mem PCI: 00:1b.0 10 * [0xcfd20000 - 0xcfd23fff] mem PCI: 00:19.0 14 * [0xcfd24000 - 0xcfd24fff] mem PCI: 00:1f.6 10 * [0xcfd25000 - 0xcfd25fff] mem PCI: 00:1f.2 24 * [0xcfd26000 - 0xcfd267ff] mem PCI: 00:1a.0 10 * [0xcfd27000 - 0xcfd273ff] mem PCI: 00:1d.0 10 * [0xcfd28000 - 0xcfd283ff] mem PCI: 00:1f.3 10 * [0xcfd29000 - 0xcfd290ff] mem PCI: 00:16.0 10 * [0xcfd2a000 - 0xcfd2a00f] mem DOMAIN: 0000 mem: next_base: cfd2a010 size: 52a010 align: 22 gran: 0 done PCI: 00:01.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:01.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:01.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:01.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.1 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.1 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.3 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.3 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.3 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.3 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.4 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1c.4 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.4 mem: base:cfc00000 size:100000 align:20 gran:20 limit:cfcfffff PCI: 05:00.0 10 * [0xcfc00000 - 0xcfc01fff] mem PCI: 00:1c.4 mem: next_base: cfc02000 size: 100000 align: 20 gran: 20 done PCI: 00:1e.0 prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1e.0 prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done PCI: 00:1e.0 mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff PCI: 00:1e.0 mem: next_base: cfffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:02.0 10 <- [0x00cf800000 - 0x00cfbfffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 20 <- [0x0000001840 - 0x0000001847] size 0x00000008 gran 0x03 io PCI: 00:16.0 10 <- [0x00cfd2a000 - 0x00cfd2a00f] size 0x00000010 gran 0x04 mem64 PCI: 00:19.0 10 <- [0x00cfd00000 - 0x00cfd1ffff] size 0x00020000 gran 0x11 mem PCI: 00:19.0 14 <- [0x00cfd24000 - 0x00cfd24fff] size 0x00001000 gran 0x0c mem PCI: 00:19.0 18 <- [0x0000001800 - 0x000000181f] size 0x00000020 gran 0x05 io PCI: 00:1a.0 EHCI Debug Port hook triggered PCI: 00:1a.0 10 <- [0x00cfd27000 - 0x00cfd273ff] size 0x00000400 gran 0x0a mem PCI: 00:1a.0 EHCI Debug Port relocated PCI: 00:1b.0 10 <- [0x00cfd20000 - 0x00cfd23fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.1 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.1 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:1c.3 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:1c.3 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:1c.4 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:1c.4 20 <- [0x00cfc00000 - 0x00cfcfffff] size 0x00100000 gran 0x14 bus 05 mem PCI: 00:1c.4 assign_resources, bus 5 link: 0 PCI: 05:00.0 10 <- [0x00cfc00000 - 0x00cfc01fff] size 0x00002000 gran 0x0d mem64 PCI: 00:1c.4 assign_resources, bus 5 link: 0 PCI: 00:1d.0 10 <- [0x00cfd28000 - 0x00cfd283ff] size 0x00000400 gran 0x0a mem PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io PCI: 00:1e.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 prefmem PCI: 00:1e.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 mem PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 164e.3 60 <- [0x0000000200 - 0x0000000207] size 0x00000008 gran 0x03 io PNP: 164e.3 29 <- [0x00000000b0 - 0x00000000af] size 0x00000000 gran 0x00 irq PNP: 164e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq PNP: 164e.3 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000001848 - 0x000000184f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000001858 - 0x000000185b] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000001850 - 0x0000001857] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x000000185c - 0x000000185f] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000001820 - 0x000000183f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00cfd26000 - 0x00cfd267ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00cfd29000 - 0x00cfd290ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.6 10 <- [0x00cfd25000 - 0x00cfd25fff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 PNP: 00ff.1 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 169c size 60 align 5 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base cf800000 size 52a010 align 22 gran 0 limit cfffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 PCI: 00:00.0 resource base c0000 size bf740000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c1c00000 size 400000 align 0 gran 0 limit 0 flags f0000200 index 6 PCI: 00:00.0 resource base c2000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:00.0 resource base 100000000 size 34000000 align 0 gran 0 limit 0 flags e0004200 index 8 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index b PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d PCI: 00:01.0 PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base cf800000 size 400000 align 22 gran 22 limit cfbfffff flags 60000201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18 PCI: 00:02.0 resource base 1840 size 8 align 3 gran 3 limit 1847 flags 60000100 index 20 PCI: 00:16.0 PCI: 00:16.0 resource base cfd2a000 size 10 align 12 gran 4 limit cfd2a00f flags 60000201 index 10 PCI: 00:16.2 PCI: 00:19.0 PCI: 00:19.0 resource base cfd00000 size 20000 align 17 gran 17 limit cfd1ffff flags 60000200 index 10 PCI: 00:19.0 resource base cfd24000 size 1000 align 12 gran 12 limit cfd24fff flags 60000200 index 14 PCI: 00:19.0 resource base 1800 size 20 align 5 gran 5 limit 181f flags 60000100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base cfd27000 size 400 align 12 gran 10 limit cfd273ff flags 60000200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base cfd20000 size 4000 align 14 gran 14 limit cfd23fff flags 60000201 index 10 PCI: 00:1c.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:1c.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20 PCI: 00:1c.1 PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.1 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:1c.1 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20 PCI: 00:1c.3 PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.3 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:1c.3 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20 PCI: 00:1c.4 child on link 0 PCI: 05:00.0 PCI: 00:1c.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.4 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:1c.4 resource base cfc00000 size 100000 align 20 gran 20 limit cfcfffff flags 60080202 index 20 PCI: 05:00.0 PCI: 05:00.0 resource base cfc00000 size 2000 align 13 gran 13 limit cfc01fff flags 60000201 index 10 PCI: 00:1d.0 PCI: 00:1d.0 resource base cfd28000 size 400 align 12 gran 10 limit cfd283ff flags 60000200 index 10 PCI: 00:1e.0 PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24 PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20 PCI: 00:1f.0 child on link 0 PNP: 164e.3 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PCI: 00:1f.0 resource base 1680 size 1c align 0 gran 0 limit 0 flags c0040100 index 10000400 PNP: 164e.3 PNP: 164e.3 resource base 200 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 164e.3 resource base b0 size 0 align 0 gran 0 limit 0 flags e0000400 index 29 PNP: 164e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 164e.3 resource base 82 size 0 align 0 gran 0 limit 0 flags e0000400 index f0 PNP: 164e.2 PNP: 164e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 164e.7 PNP: 164e.7 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60 PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 164e.19 PNP: 164e.19 resource base 0 size 2 align 1 gran 1 limit ffff flags 100 index 60 PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 1848 size 8 align 3 gran 3 limit 184f flags 60000100 index 10 PCI: 00:1f.2 resource base 1858 size 4 align 2 gran 2 limit 185b flags 60000100 index 14 PCI: 00:1f.2 resource base 1850 size 8 align 3 gran 3 limit 1857 flags 60000100 index 18 PCI: 00:1f.2 resource base 185c size 4 align 2 gran 2 limit 185f flags 60000100 index 1c PCI: 00:1f.2 resource base 1820 size 20 align 5 gran 5 limit 183f flags 60000100 index 20 PCI: 00:1f.2 resource base cfd26000 size 800 align 12 gran 11 limit cfd267ff flags 60000200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base cfd29000 size 100 align 12 gran 8 limit cfd290ff flags 60000201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.6 PCI: 00:1f.6 resource base cfd25000 size 1000 align 12 gran 12 limit cfd25fff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 1088000 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 17aa/2193 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 00 PCI: 00:02.0 subsystem <- 17aa/215a PCI: 00:02.0 cmd <- 03 PCI: 00:16.0 cmd <- 02 PCI: 00:19.0 subsystem <- 17aa/2153 PCI: 00:19.0 cmd <- 03 PCI: 00:1a.0 subsystem <- 17aa/2163 PCI: 00:1a.0 cmd <- 02 PCI: 00:1b.0 subsystem <- 17aa/215e PCI: 00:1b.0 cmd <- 02 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 cmd <- 00 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 cmd <- 00 PCI: 00:1c.3 bridge ctrl <- 0003 PCI: 00:1c.3 cmd <- 00 PCI: 00:1c.4 bridge ctrl <- 0003 PCI: 00:1c.4 cmd <- 06 PCI: 00:1d.0 subsystem <- 17aa/2163 PCI: 00:1d.0 cmd <- 02 PCI: 00:1e.0 bridge ctrl <- 0003 PCI: 00:1e.0 cmd <- 00 (NOT WRITTEN!) pch_decode_init PCI: 00:1f.0 subsystem <- 17aa/2166 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 17aa/2168 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 17aa/2167 PCI: 00:1f.3 cmd <- 03 PCI: 00:1f.6 cmd <- 02 PCI: 05:00.0 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 0 run 34750 exit 0 Initializing devices... Root Device init ... starting SPI configuration SPI configured Root Device init finished in 2253 usecs PNP: 00ff.2 init ... PNP: 00ff.2 init finished in 747 usecs CPU_CLUSTER: 0 init ... start_eip=0x00001000, code_size=0x00000031 Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0x00038000 Adjusting 00038002: 0x00000024 -> 0x00038024 Adjusting 0003801d: 0x0000003c -> 0x0003803c Adjusting 00038026: 0x00000024 -> 0x00038024 Adjusting 00038054: 0x000000d8 -> 0x000380d8 Adjusting 00038066: 0x0000015c -> 0x0003815c Adjusting 0003806d: 0x000000c0 -> 0x000380c0 Adjusting 00038075: 0x000000c4 -> 0x000380c4 Adjusting 0003807e: 0x000000d0 -> 0x000380d0 Adjusting 00038085: 0x000000cc -> 0x000380cc Adjusting 0003808b: 0x000000c8 -> 0x000380c8 SMM Module: stub loaded at 00038000. Will call 001193fb(00137ac0) Installing SMM handler to 0xbf800000 Loading module at bf810000 with entry bf8105ea. filesize: 0x1a18 memsize: 0x5a40 Processing 78 relocs. Offset value of 0xbf810000 Adjusting bf810036: 0x00001934 -> 0xbf811934 Adjusting bf810055: 0x00001934 -> 0xbf811934 Adjusting bf810108: 0x00001934 -> 0xbf811934 Adjusting bf810198: 0x0000188e -> 0xbf81188e Adjusting bf8104cd: 0x00001a18 -> 0xbf811a18 Adjusting bf8104ea: 0x00001a24 -> 0xbf811a24 Adjusting bf810501: 0x00001a24 -> 0xbf811a24 Adjusting bf8105b7: 0x00001a10 -> 0xbf811a10 Adjusting bf8105cd: 0x00001960 -> 0xbf811960 Adjusting bf8105f3: 0x00001a18 -> 0xbf811a18 Adjusting bf810601: 0x00001a18 -> 0xbf811a18 Adjusting bf81060e: 0x00001a00 -> 0xbf811a00 Adjusting bf810619: 0x00001a00 -> 0xbf811a00 Adjusting bf81062d: 0x00001a04 -> 0xbf811a04 Adjusting bf810633: 0x00001a1c -> 0xbf811a1c Adjusting bf81063b: 0x00001a04 -> 0xbf811a04 Adjusting bf810658: 0x00001a1c -> 0xbf811a1c Adjusting bf810661: 0x00001a00 -> 0xbf811a00 Adjusting bf810715: 0x00001a28 -> 0xbf811a28 Adjusting bf810732: 0x00001a28 -> 0xbf811a28 Adjusting bf81079f: 0x00001a20 -> 0xbf811a20 Adjusting bf8107af: 0x00001a20 -> 0xbf811a20 Adjusting bf8107d5: 0x00001a20 -> 0xbf811a20 Adjusting bf81083c: 0x00001897 -> 0xbf811897 Adjusting bf81094a: 0x00001a0c -> 0xbf811a0c Adjusting bf810973: 0x00001a0c -> 0xbf811a0c Adjusting bf810990: 0x00001a0c -> 0xbf811a0c Adjusting bf8109b9: 0x00001a08 -> 0xbf811a08 Adjusting bf8109d6: 0x00001a0c -> 0xbf811a0c Adjusting bf8109fc: 0x00001a08 -> 0xbf811a08 Adjusting bf810ae8: 0x00001a0c -> 0xbf811a0c Adjusting bf810aed: 0x00001a08 -> 0xbf811a08 Adjusting bf810afc: 0x00001920 -> 0xbf811920 Adjusting bf810e38: 0x00001a2c -> 0xbf811a2c Adjusting bf810e67: 0x00001a30 -> 0xbf811a30 Adjusting bf810e7a: 0x00001a2c -> 0xbf811a2c Adjusting bf810e9d: 0x00001a30 -> 0xbf811a30 Adjusting bf810f3b: 0x00001a2c -> 0xbf811a2c Adjusting bf81112a: 0x00001a2c -> 0xbf811a2c Adjusting bf8111a9: 0x00001a30 -> 0xbf811a30 Adjusting bf81146c: 0x00001a10 -> 0xbf811a10 Adjusting bf81147c: 0x00001a10 -> 0xbf811a10 Adjusting bf811491: 0x00001a10 -> 0xbf811a10 Adjusting bf8114b2: 0x00001a10 -> 0xbf811a10 Adjusting bf8114dc: 0x00001a10 -> 0xbf811a10 Adjusting bf8114ef: 0x00001a10 -> 0xbf811a10 Adjusting bf811502: 0x00001a38 -> 0xbf811a38 Adjusting bf811554: 0x00001a38 -> 0xbf811a38 Adjusting bf81155a: 0x00001a34 -> 0xbf811a34 Adjusting bf811567: 0x00001a10 -> 0xbf811a10 Adjusting bf81158d: 0x00001a10 -> 0xbf811a10 Adjusting bf8115e2: 0x00001a34 -> 0xbf811a34 Adjusting bf811639: 0x00001903 -> 0xbf811903 Adjusting bf811654: 0x00001a10 -> 0xbf811a10 Adjusting bf811675: 0x00001958 -> 0xbf811958 Adjusting bf81167a: 0x00001a34 -> 0xbf811a34 Adjusting bf81173d: 0x00001a10 -> 0xbf811a10 Adjusting bf81176b: 0x00001a10 -> 0xbf811a10 Adjusting bf8117b4: 0x00001a10 -> 0xbf811a10 Adjusting bf811852: 0x00001a34 -> 0xbf811a34 Adjusting bf811866: 0x00001a10 -> 0xbf811a10 Adjusting bf811918: 0x00001878 -> 0xbf811878 Adjusting bf811920: 0x00000021 -> 0xbf810021 Adjusting bf811924: 0x00001878 -> 0xbf811878 Adjusting bf81192c: 0x00000092 -> 0xbf810092 Adjusting bf811938: 0x00001944 -> 0xbf811944 Adjusting bf811944: 0x000002d2 -> 0xbf8102d2 Adjusting bf811948: 0x000002de -> 0xbf8102de Adjusting bf81194c: 0x000002e1 -> 0xbf8102e1 Adjusting bf811970: 0x00001623 -> 0xbf811623 Adjusting bf811974: 0x000014c2 -> 0xbf8114c2 Adjusting bf811980: 0x00001564 -> 0xbf811564 Adjusting bf811984: 0x00001469 -> 0xbf811469 Adjusting bf811988: 0x0000148a -> 0xbf81148a Adjusting bf81198c: 0x00001485 -> 0xbf811485 Adjusting bf811994: 0x0000158a -> 0xbf81158a Adjusting bf811998: 0x00001479 -> 0xbf811479 Adjusting bf8119b4: 0x000015cd -> 0xbf8115cd Loading module at bf808000 with entry bf808000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0xbf808000 Adjusting bf808002: 0x00000024 -> 0xbf808024 Adjusting bf80801d: 0x0000003c -> 0xbf80803c Adjusting bf808026: 0x00000024 -> 0xbf808024 Adjusting bf808054: 0x000000d8 -> 0xbf8080d8 Adjusting bf808066: 0x0000015c -> 0xbf80815c Adjusting bf80806d: 0x000000c0 -> 0xbf8080c0 Adjusting bf808075: 0x000000c4 -> 0xbf8080c4 Adjusting bf80807e: 0x000000d0 -> 0xbf8080d0 Adjusting bf808085: 0x000000cc -> 0xbf8080cc Adjusting bf80808b: 0x000000c8 -> 0xbf8080c8 SMM Module: placing jmp sequence at bf807c00 rel16 0x03fd SMM Module: placing jmp sequence at bf807800 rel16 0x07fd SMM Module: placing jmp sequence at bf807400 rel16 0x0bfd SMM Module: stub loaded at bf808000. Will call bf8105ea(00000000) Initializing southbridge SMI... ... pmbase = 0x0500 SMI_STS: MCSMI PM1 PM1_STS: WAK BM TMROF GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 TCO_STS: ... raise SMI# In relocation handler: cpu 0 New SMBASE=0xbf800000 IEDBASE=0xbfc00000 @ 0003fc00 Writing SMRR. base = 0xbf800006, mask=0xff800800 Relocation complete. Locking SMM. Initializing CPU #0 CPU: vendor Intel device 20655 CPU: family 06, model 25, stepping 05 Enabling cache CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 12d80 size 2c00 microcode: sig=0x20655 pf=0x10 revision=0x4 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. CPU:lapic=0, boot_cpu=1 MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6 0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 0x0000000100000000 - 0x0000000134000000 size 0x34000000 type 6 MTRR addr 0x0-0x10 set to 6 type @ 0 MTRR addr 0x10-0x20 set to 6 type @ 1 MTRR addr 0x20-0x30 set to 6 type @ 2 MTRR addr 0x30-0x40 set to 6 type @ 3 MTRR addr 0x40-0x50 set to 6 type @ 4 MTRR addr 0x50-0x60 set to 6 type @ 5 MTRR addr 0x60-0x70 set to 6 type @ 6 MTRR addr 0x70-0x80 set to 6 type @ 7 MTRR addr 0x80-0x84 set to 6 type @ 8 MTRR addr 0x84-0x88 set to 6 type @ 9 MTRR addr 0x88-0x8c set to 6 type @ 10 MTRR addr 0x8c-0x90 set to 6 type @ 11 MTRR addr 0x90-0x94 set to 6 type @ 12 MTRR addr 0x94-0x98 set to 6 type @ 13 MTRR addr 0x98-0x9c set to 6 type @ 14 MTRR addr 0x9c-0xa0 set to 6 type @ 15 MTRR addr 0xa0-0xa4 set to 0 type @ 16 MTRR addr 0xa4-0xa8 set to 0 type @ 17 MTRR addr 0xa8-0xac set to 0 type @ 18 MTRR addr 0xac-0xb0 set to 0 type @ 19 MTRR addr 0xb0-0xb4 set to 0 type @ 20 MTRR addr 0xb4-0xb8 set to 0 type @ 21 MTRR addr 0xb8-0xbc set to 0 type @ 22 MTRR addr 0xbc-0xc0 set to 0 type @ 23 MTRR addr 0xc0-0xc1 set to 6 type @ 24 MTRR addr 0xc1-0xc2 set to 6 type @ 25 MTRR addr 0xc2-0xc3 set to 6 type @ 26 MTRR addr 0xc3-0xc4 set to 6 type @ 27 MTRR addr 0xc4-0xc5 set to 6 type @ 28 MTRR addr 0xc5-0xc6 set to 6 type @ 29 MTRR addr 0xc6-0xc7 set to 6 type @ 30 MTRR addr 0xc7-0xc8 set to 6 type @ 31 MTRR addr 0xc8-0xc9 set to 6 type @ 32 MTRR addr 0xc9-0xca set to 6 type @ 33 MTRR addr 0xca-0xcb set to 6 type @ 34 MTRR addr 0xcb-0xcc set to 6 type @ 35 MTRR addr 0xcc-0xcd set to 6 type @ 36 MTRR addr 0xcd-0xce set to 6 type @ 37 MTRR addr 0xce-0xcf set to 6 type @ 38 MTRR addr 0xcf-0xd0 set to 6 type @ 39 MTRR addr 0xd0-0xd1 set to 6 type @ 40 MTRR addr 0xd1-0xd2 set to 6 type @ 41 MTRR addr 0xd2-0xd3 set to 6 type @ 42 MTRR addr 0xd3-0xd4 set to 6 type @ 43 MTRR addr 0xd4-0xd5 set to 6 type @ 44 MTRR addr 0xd5-0xd6 set to 6 type @ 45 MTRR addr 0xd6-0xd7 set to 6 type @ 46 MTRR addr 0xd7-0xd8 set to 6 type @ 47 MTRR addr 0xd8-0xd9 set to 6 type @ 48 MTRR addr 0xd9-0xda set to 6 type @ 49 MTRR addr 0xda-0xdb set to 6 type @ 50 MTRR addr 0xdb-0xdc set to 6 type @ 51 MTRR addr 0xdc-0xdd set to 6 type @ 52 MTRR addr 0xdd-0xde set to 6 type @ 53 MTRR addr 0xde-0xdf set to 6 type @ 54 MTRR addr 0xdf-0xe0 set to 6 type @ 55 MTRR addr 0xe0-0xe1 set to 6 type @ 56 MTRR addr 0xe1-0xe2 set to 6 type @ 57 MTRR addr 0xe2-0xe3 set to 6 type @ 58 MTRR addr 0xe3-0xe4 set to 6 type @ 59 MTRR addr 0xe4-0xe5 set to 6 type @ 60 MTRR addr 0xe5-0xe6 set to 6 type @ 61 MTRR addr 0xe6-0xe7 set to 6 type @ 62 MTRR addr 0xe7-0xe8 set to 6 type @ 63 MTRR addr 0xe8-0xe9 set to 6 type @ 64 MTRR addr 0xe9-0xea set to 6 type @ 65 MTRR addr 0xea-0xeb set to 6 type @ 66 MTRR addr 0xeb-0xec set to 6 type @ 67 MTRR addr 0xec-0xed set to 6 type @ 68 MTRR addr 0xed-0xee set to 6 type @ 69 MTRR addr 0xee-0xef set to 6 type @ 70 MTRR addr 0xef-0xf0 set to 6 type @ 71 MTRR addr 0xf0-0xf1 set to 6 type @ 72 MTRR addr 0xf1-0xf2 set to 6 type @ 73 MTRR addr 0xf2-0xf3 set to 6 type @ 74 MTRR addr 0xf3-0xf4 set to 6 type @ 75 MTRR addr 0xf4-0xf5 set to 6 type @ 76 MTRR addr 0xf5-0xf6 set to 6 type @ 77 MTRR addr 0xf6-0xf7 set to 6 type @ 78 MTRR addr 0xf7-0xf8 set to 6 type @ 79 MTRR addr 0xf8-0xf9 set to 6 type @ 80 MTRR addr 0xf9-0xfa set to 6 type @ 81 MTRR addr 0xfa-0xfb set to 6 type @ 82 MTRR addr 0xfb-0xfc set to 6 type @ 83 MTRR addr 0xfc-0xfd set to 6 type @ 84 MTRR addr 0xfd-0xfe set to 6 type @ 85 MTRR addr 0xfe-0xff set to 6 type @ 86 MTRR addr 0xff-0x100 set to 6 type @ 87 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 4/5. MTRR: WB selected as default type. MTRR: 0 base 0x00000000bf800000 mask 0x0000000fff800000 type 0 MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x00 done. Enabling VMX model_x06ax: frequency set to 2394 Turbo is available and visible CPU: 0 has 2 cores, 2 threads per core CPU: 0 has core 1 CPU1: stack_base 00131000, stack_end 00131ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 1. After apic_write. In relocation handler: cpu 1 New SMBASE=0xbf7ffc00 IEDBASE=0xbfc00000 @ 0003fc00 Startup point 1. Waiting for send to finish... +Writing SMRR. base = 0xbf800006, mask=0xff800800 Sending STARTUP #2 to 1. Initializing CPU #1 After apic_write. CPU: vendor Intel device 20655 Startup point 1. CPU: family 06, model 25, stepping 05 Waiting for send to finish... Enabling cache +CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) After Startup. CBFS: Locating 'cpu_microcode_blob.bin' CPU: 0 has core 4 CPU2: stack_base 00130000, stack_end 00130ff8 CBFS: Found @ offset 12d80 size 2c00 Asserting INIT. microcode: sig=0x20655 pf=0x10 revision=0x4 Waiting for send to finish... +CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. Deasserting INIT. CPU:lapic=1, boot_cpu=0 Waiting for send to finish... +MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 #startup loops: 2. call enable_fixed_mtrr() Sending STARTUP #1 to 4. CPU physical address size: 36 bits After apic_write. MTRR check Fixed MTRRs : Enabled Variable MTRRs: Startup point 1. Waiting for send to finish... +Enabled In relocation handler: cpu 2 Setting up local APIC...Sending STARTUP #2 to 4. After apic_write. apic_id: 0x01 done. New SMBASE=0xbf7ff800 IEDBASE=0xbfc00000 @ 0003fc00 Startup point 1. Waiting for send to finish... +Enabling VMX After Startup. model_x06ax: frequency set to 2394 CPU #1 initialized Writing SMRR. base = 0xbf800006, mask=0xff800800 CPU: 0 has core 5 CPU3: stack_base 0012f000, stack_end 0012fff8 Initializing CPU #2 Asserting INIT. Waiting for send to finish... +CPU: vendor Intel device 20655 Deasserting INIT. Waiting for send to finish... +CPU: family 06, model 25, stepping 05 #startup loops: 2. Sending STARTUP #1 to 5. After apic_write. Enabling cache Startup point 1. Waiting for send to finish... +CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) Sending STARTUP #2 to 5. After apic_write. CBFS: Locating 'cpu_microcode_blob.bin' Startup point 1. Waiting for send to finish... +In relocation handler: cpu 3 After Startup. CBFS: Found @ offset 12d80 size 2c00 New SMBASE=0xbf7ff400 IEDBASE=0xbfc00000 @ 0003fc00 microcode: sig=0x20655 pf=0x10 revision=0x0 Writing SMRR. base = 0xbf800006, mask=0xff800800 microcode: updated to revision 0x4 date=2013-06-28 CPU #0 initialized Waiting for 2 CPUS to stop Initializing CPU #3 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. CPU: vendor Intel device 20655 CPU:lapic=4, boot_cpu=0 CPU: family 06, model 25, stepping 05 MTRR: Fixed MSR 0x250 0x0606060606060606 Enabling cache MTRR: Fixed MSR 0x258 0x0606060606060606 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) MTRR: Fixed MSR 0x259 0x0000000000000000 CBFS: Locating 'cpu_microcode_blob.bin' MTRR: Fixed MSR 0x268 0x0606060606060606 CBFS: Found @ offset 12d80 size 2c00 MTRR: Fixed MSR 0x269 0x0606060606060606 microcode: sig=0x20655 pf=0x10 revision=0x4 MTRR: Fixed MSR 0x26a 0x0606060606060606 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. MTRR: Fixed MSR 0x26b 0x0606060606060606 CPU:lapic=5, boot_cpu=0 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x268 0x0606060606060606 call enable_fixed_mtrr() MTRR: Fixed MSR 0x269 0x0606060606060606 CPU physical address size: 36 bits MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR check MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 Fixed MTRRs : call enable_fixed_mtrr() Enabled CPU physical address size: 36 bits Variable MTRRs: MTRR check Enabled Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC...Setting up local APIC... apic_id: 0x04 done. apic_id: 0x05 done. Enabling VMX Enabling VMX model_x06ax: frequency set to 2394 model_x06ax: frequency set to 2394 CPU #2 initialized CPU #3 initialized Waiting for 1 CPUS to stop All AP CPUs stopped (13387 loops) CPU0: stack: 00132000 - 00133000, lowest used address 00132aa0, stack used: 1376 bytes CPU1: stack: 00131000 - 00132000, lowest used address 00131c44, stack used: 956 bytes CPU2: stack: 00130000 - 00131000, lowest used address 00130c44, stack used: 956 bytes CPU3: stack: 0012f000 - 00130000, lowest used address 0012fc44, stack used: 956 bytes CPU_CLUSTER: 0 init finished in 664872 usecs PCI: 00:00.0 init ... Set BIOS_RESET_CPL PCI: 00:00.0 init finished in 2489 usecs PCI: 00:02.0 init ... GT Power Management Init IVB GT1 Power Meter Weights GT init timeout Initializing VGA without OPROM. MMIO 0xcf800000 EDID: 00 ff ff ff ff ff ff 00 30 ae 11 40 00 00 00 00 00 13 01 03 80 1a 10 78 ea 5c d5 93 5c 5e 8e 27 1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 ee 1a 00 80 50 20 10 30 10 30 13 00 05 a3 10 00 00 19 d0 17 00 c6 50 20 19 30 30 20 36 00 05 a3 10 00 00 19 00 00 00 0f 00 81 0a 3c 81 0a 32 16 09 00 4c a3 41 54 00 00 00 fe 00 4c 54 4e 31 32 31 41 54 30 37 4c 30 32 00 38 Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 ae 11 40 00 00 00 00 00 13 version: 01 03 basic params: 80 1a 10 78 ea chroma info: 5c d5 93 5c 5e 8e 27 1c 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: ee 1a 00 80 50 20 10 30 10 30 13 00 05 a3 10 00 00 19 descriptor 2: d0 17 00 c6 50 20 19 30 30 20 36 00 05 a3 10 00 00 19 descriptor 3: 00 00 00 0f 00 81 0a 3c 81 0a 32 16 09 00 4c a3 41 54 descriptor 4: 00 00 00 fe 00 4c 54 4e 31 32 31 41 54 30 37 4c 30 32 extensions: 00 checksum: 38 Manufacturer: LEN Model 4011 Serial Number 0 Made week 0 of 2009 EDID version: 1.3 Digital display Maximum image size: 26 cm x 16 cm Gamma: 220% Check DPMS levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, YCrCb 4:2:2 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: ee1a0080502010301030130005a310000019 Detailed mode (IN HEX): Clock 68940 KHz, 105 mm x a3 mm 0500 0510 0540 0580 hborder 0 0320 0321 0324 0330 vborder 0 -hsync -vsync Did detailed timing Hex of detail: d01700c6502019303020360005a310000019 Detailed mode (IN HEX): Clock 60960 KHz, 105 mm x a3 mm 0500 0530 0550 05c6 hborder 0 0320 0323 0329 0339 vborder 0 -hsync -vsync Hex of detail: 0000000f00810a3c810a321609004ca34154 Manufacturer-specified data, tag 15 Hex of detail: 000000fe004c544e313231415430374c3032 ASCII string: LTN121AT07L02 Checksum Checksum: 0x38 (valid) WARNING: EDID block does NOT fully conform to EDID 1.3. Missing name descriptor Missing monitor ranges bringing up panel at resolution 1280 x 800 Borders 0 x 0 Blank 128 x 16 Sync 48 x 3 Front porch 16 x 1 Spread spectrum clock Single channel Polarities 1, 1 Data M1=1204813, N1=8388608 Link frequency 270000 kHz Link M1=133868, N1=524288 Pixel N=8, M1=24, M2=9, P1=2 Pixel clock 138214 kHz waiting for panel powerup panel powered up GT Power Management Init (post VBIOS) GT init timeout PCI: 00:02.0 init finished in 229000 usecs PCI: 00:16.0 init ... ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : YES ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Host communication established ME: BIOS path: Normal ME: Extend SHA-256: 4525e6abe84786a34336e0a901dcaacbfc97cfc5bf640f7b78eb11bac53c2f86 PCI: 00:16.0 init finished in 23000 usecs PCI: 00:19.0 init ... PCI: 00:19.0 init finished in 746 usecs PCI: 00:1a.0 init ... EHCI: Setting up controller.. done. PCI: 00:1a.0 init finished in 1997 usecs PCI: 00:1b.0 init ... Azalia: base = cfd20000 Azalia: V1CTL disabled. Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862804 Azalia: verb_size: 16 Azalia: verb loaded. Azalia: Initializing codec #0 Azalia: codec viddid: 14f15069 Azalia: verb_size: 44 Azalia: verb loaded. PCI: 00:1b.0 init finished in 15124 usecs PCI: 00:1d.0 init ... EHCI: Setting up controller.. done. PCI: 00:1d.0 init finished in 1990 usecs PCI: 00:1e.0 init ... PCI init. PCI: 00:1e.0 init finished in 1257 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x01 IOAPIC: Dumping registers reg 0x0000: 0x01000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00170020 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 Set power off after power failure. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 NMI sources enabled. Mobile 5 PM init rtc_failed = 0x0 RTC Init Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: done. PCI: 00:1f.0 init finished in 25000 usecs PCI: 00:1f.2 init ... SATA: Initializing... CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 SATA: Controller in AHCI mode. ABAR: cfd26000 PCI: 00:1f.2 init finished in 7779 usecs PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 754 usecs PCI: 00:1f.6 init ... Thermal init start. Thermal init done. PCI: 00:1f.6 init finished in 2247 usecs PCI: 05:00.0 init ... PCI: 05:00.0 init finished in 748 usecs PNP: 164e.3 init ... PNP: 164e.3 init finished in 748 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... I2C: 01:54 init finished in 1488 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... I2C: 01:55 init finished in 1496 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... I2C: 01:56 init finished in 1496 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... I2C: 01:57 init finished in 1496 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... Locking EEPROM RFID init EEPROM done I2C: 01:5c init finished in 27246 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... I2C: 01:5d init finished in 1498 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... I2C: 01:5e init finished in 1495 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... I2C: 01:5f init finished in 1495 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 PNP: 00ff.1: enabled 1 PNP: 00ff.2: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.2: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 164e.3: enabled 1 PNP: 164e.2: enabled 0 PNP: 164e.7: enabled 0 PNP: 164e.19: enabled 0 PNP: 0c31.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 01:54: enabled 1 I2C: 01:55: enabled 1 I2C: 01:56: enabled 1 I2C: 01:57: enabled 1 I2C: 01:5c: enabled 1 I2C: 01:5d: enabled 1 I2C: 01:5e: enabled 1 I2C: 01:5f: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:1e.0: enabled 1 PCI: 00:1f.6: enabled 1 PCI: 05:00.0: enabled 1 APIC: 01: enabled 1 APIC: 04: enabled 1 APIC: 05: enabled 1 BS: BS_DEV_INIT times (us): entry 4 run 1092720 exit 0 Finalize devices... Devices finalized BS: BS_POST_DEVICE times (us): entry 0 run 1497 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 Updating MRC cache data. CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fec0 size 10000 find_current_mrc_cache_local: picked entry 4 from cache block SF: Detected MX25L6405D with sector size 0x1000, total 0x800000 find_next_mrc_cache: picked next entry from cache block at ffdb5000 Finally: write MRC cache update to flash at ffdb5000 Successfully wrote MRC cache CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 45600 size 391b CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at bf6b0000. ACPI: * FACS ACPI: * DSDT ACPI: * IGD OpRegion GET_VBIOS: aa55 8086 0 0 3 ... VBIOS found at 000c0000 ACPI: * FADT ACPI: added table 1/32, length now 40 ACPI: * SSDT Digitizer state forced as absent Found 1 CPU(s) with 4 core(s) each. PSS: 2401MHz power 25000 control 0x16 status 0x16 PSS: 2400MHz power 25000 control 0x12 status 0x12 PSS: 2266MHz power 23316 control 0x11 status 0x11 PSS: 2133MHz power 21689 control 0x10 status 0x10 PSS: 2000MHz power 20116 control 0xf status 0xf PSS: 1866MHz power 18531 control 0xe status 0xe PSS: 1733MHz power 17021 control 0xd status 0xd PSS: 1600MHz power 15517 control 0xc status 0xc PSS: 1466MHz power 14068 control 0xb status 0xb PSS: 1333MHz power 12640 control 0xa status 0xa PSS: 1200MHz power 11250 control 0x9 status 0x9 PSS: 2401MHz power 25000 control 0x16 status 0x16 PSS: 2400MHz power 25000 control 0x12 status 0x12 PSS: 2266MHz power 23316 control 0x11 status 0x11 PSS: 2133MHz power 21689 control 0x10 status 0x10 PSS: 2000MHz power 20116 control 0xf status 0xf PSS: 1866MHz power 18531 control 0xe status 0xe PSS: 1733MHz power 17021 control 0xd status 0xd PSS: 1600MHz power 15517 control 0xc status 0xc PSS: 1466MHz power 14068 control 0xb status 0xb PSS: 1333MHz power 12640 control 0xa status 0xa PSS: 1200MHz power 11250 control 0x9 status 0x9 PSS: 2401MHz power 25000 control 0x16 status 0x16 PSS: 2400MHz power 25000 control 0x12 status 0x12 PSS: 2266MHz power 23316 control 0x11 status 0x11 PSS: 2133MHz power 21689 control 0x10 status 0x10 PSS: 2000MHz power 20116 control 0xf status 0xf PSS: 1866MHz power 18531 control 0xe status 0xe PSS: 1733MHz power 17021 control 0xd status 0xd PSS: 1600MHz power 15517 control 0xc status 0xc PSS: 1466MHz power 14068 control 0xb status 0xb PSS: 1333MHz power 12640 control 0xa status 0xa PSS: 1200MHz power 11250 control 0x9 status 0x9 PSS: 2401MHz power 25000 control 0x16 status 0x16 PSS: 2400MHz power 25000 control 0x12 status 0x12 PSS: 2266MHz power 23316 control 0x11 status 0x11 PSS: 2133MHz power 21689 control 0x10 status 0x10 PSS: 2000MHz power 20116 control 0xf status 0xf PSS: 1866MHz power 18531 control 0xe status 0xe PSS: 1733MHz power 17021 control 0xd status 0xd PSS: 1600MHz power 15517 control 0xc status 0xc PSS: 1466MHz power 14068 control 0xb status 0xb PSS: 1333MHz power 12640 control 0xa status 0xa PSS: 1200MHz power 11250 control 0x9 status 0x9 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at bf69d000 ACPI: added table 4/32, length now 52 ACPI: * MADT ACPI: added table 5/32, length now 56 current = bf6b4e00 ACPI: * HPET ACPI: added table 6/32, length now 60 ACPI: done. ACPI tables: 20032 bytes. smbios_write_tables: bf69c000 recv_ec_data: 0x36 recv_ec_data: 0x51 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x34 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x12 recv_ec_data: 0x03 Root Device (LENOVO ThinkPad X201) PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) PNP: 00ff.2 (Lenovo H8 EC) CPU_CLUSTER: 0 (Intel i7 (Nehalem) integrated Northbridge) APIC: 00 (Intel Nehalem CPU) DOMAIN: 0000 (Intel i7 (Nehalem) integrated Northbridge) PCI: 00:00.0 (Intel i7 (Nehalem) integrated Northbridge) PCI: 00:02.0 (Intel i7 (Nehalem) integrated Northbridge) PCI: 00:16.2 (unknown) PCI: 00:19.0 (unknown) PCI: 00:1a.0 (unknown) PCI: 00:1b.0 (unknown) PCI: 00:1c.0 (unknown) PCI: 00:1c.1 (unknown) PCI: 00:1c.3 (unknown) PCI: 00:1c.4 (unknown) PCI: 00:1d.0 (unknown) PCI: 00:1f.0 (unknown) PNP: 164e.3 (NSC PC87382 Docking LPC Switch) PNP: 164e.2 (NSC PC87382 Docking LPC Switch) PNP: 164e.7 (NSC PC87382 Docking LPC Switch) PNP: 164e.19 (NSC PC87382 Docking LPC Switch) PNP: 0c31.0 (LPC TPM) PCI: 00:1f.2 (unknown) PCI: 00:1f.3 (unknown) I2C: 01:54 (AT24RF08C) I2C: 01:55 (AT24RF08C) I2C: 01:56 (AT24RF08C) I2C: 01:57 (AT24RF08C) I2C: 01:5c (AT24RF08C) I2C: 01:5d (AT24RF08C) I2C: 01:5e (AT24RF08C) I2C: 01:5f (AT24RF08C) PCI: 00:01.0 (unknown) PCI: 00:16.0 (unknown) PCI: 00:1e.0 (unknown) PCI: 00:1f.6 (unknown) PCI: 05:00.0 (unknown) APIC: 01 (unknown) APIC: 04 (unknown) APIC: 05 (unknown) SMBIOS tables: 426 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 71 Writing coreboot table at 0xbf6d4000 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-00000000bf69bfff: RAM 4. 00000000bf69c000-00000000bf7fffff: CONFIGURATION TABLES 5. 00000000bf800000-00000000bfffffff: RESERVED 6. 00000000c1c00000-00000000c3ffffff: RESERVED 7. 00000000d0000000-00000000efffffff: RESERVED 8. 00000000fed00000-00000000fedfffff: RESERVED 9. 0000000100000000-0000000133ffffff: RAM CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 1d280 size 698 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) FMAP: Found "FLASH" version 1.1 at 590000. FMAP: base = ff800000 size = 800000 #areas = 3 Wrote coreboot table at: bf6d4000, 0xa4c bytes, checksum fa03 coreboot table: 2660 bytes. IMD ROOT 0. bf7ff000 00001000 IMD SMALL 1. bf7fe000 00001000 CONSOLE 2. bf7de000 00020000 TIME STAMP 3. bf7dd000 00000400 MRC DATA 4. bf7dc000 000005d0 ACPI RESUME 5. bf6dc000 00100000 COREBOOT 6. bf6d4000 00008000 ACPI 7. bf6b0000 00024000 ACPI GNVS 8. bf6af000 00001000 4f444749 9. bf6ad000 00002000 TCPA LOG 10. bf69d000 00010000 SMBIOS 11. bf69c000 00000800 IMD small region: IMD ROOT 0. bf7fec00 00000400 CAR GLOBALS 1. bf7fea40 000001c0 USBDEBUG 2. bf7fe9e0 00000058 ROMSTAGE 3. bf7fe9c0 00000004 GDT 4. bf7fe7c0 00000200 BS: BS_WRITE_TABLES times (us): entry 23487 run 256124 exit 0 CBFS: 'Master Header Locator' located CBFS at [590100:7fffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 7bfc0 size eedc Loading segment from ROM address 0xffe0c0f8 code (compression=1) New segment dstaddr 0xe4060 memsize 0x1bfa0 srcaddr 0xffe0c130 filesize 0xeea4 Loading segment from ROM address 0xffe0c114 Entry Point 0x000ff06e Payload being loaded at below 1MiB without region being marked as RAM usable. Bounce Buffer at bf624000, 489120 bytes Loading Segment: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eea4 lb: [0x0000000000100000, 0x000000000013bb50) Post relocation: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eea4 using LZMA [ 0x000e4060, 00100000, 0x00100000) <- ffe0c130 dest 000e4060, end 00100000, bouncebuffer bf624000 Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 45874 exit 0 PCH watchdog disabled Jumping to boot code at 000ff06e(bf6d4000) CPU0: stack: 00132000 - 00133000, lowest used address 00132a10, stack used: 1520 bytes entry = 0x000ff06e lb_start = 0x00100000 lb_size = 0x0003bb50 buffer = 0xbf624000