Re: [coreboot] SimNOW VGA int 1a

[Myles Watson]

On Thu, Oct 16, 2008 at 1:25 PM, ron minnich  wrote:
> On Thu, Oct 16, 2008 at 12:19 PM, Marc Jones  wrote:
> > AH! I see. We shouldn't be running out of the ROM. That will be slow. We
> > should copy the VGA BIOS to real memory and run it there.
> >
> > Why are you doing ROM init in stage0? I thought this was well into
>
> stage2.
> >
>
> So, safety tip: we can't call ANY ROM in stage2 when we're running
> doing ROM init.
>
> And I just realized the problem: we're calling printk and printk is in ROM.
>
> no printks allowed in pcibios.c unless we move printk to RAM, i.e.
> compile printk into stage2.
>
> What a revolting development this is! Our beautiful "common code in
> ROM" idea is going down in flames.

Can we make it cached?

Myles

SimNOW VGA int 1a

[Myles Watson]

On Thu, Oct 16, 2008 at 1:27 PM, Myles Watson  wrote:
> On Thu, Oct 16, 2008 at 1:25 PM, ron minnich  wrote:
> > On Thu, Oct 16, 2008 at 12:19 PM, Marc Jones  wrote:
> > > AH! I see. We shouldn't be running out of the ROM. That will be slow. We
> > > should copy the VGA BIOS to real memory and run it there.
> > >
> > > Why are you doing ROM init in stage0? I thought this was well into
> >
> > stage2.
> > >
> >
> > So, safety tip: we can't call ANY ROM in stage2 when we're running
> > doing ROM init.
> >
> > And I just realized the problem: we're calling printk and printk is in
> > ROM.
> >
> > no printks allowed in pcibios.c unless we move printk to RAM, i.e.
> > compile printk into stage2.
> >
> > What a revolting development this is! Our beautiful "common code in
> > ROM" idea is going down in flames.

Wait a second.  The reason this is broken is that the code setting the PCI
decode register is in the ROM.  Can we fix this by calling
pci_conf1_write_config32 instead?  It looks like it's in RAM.

Myles

SimNOW VGA int 1a

[ron minnich]

On Thu, Oct 16, 2008 at 12:30 PM, Myles Watson  wrote:
> Wait a second.  The reason this is broken is that the code setting the PCI
> decode register is in the ROM.  Can we fix this by calling
> pci_conf1_write_config32 instead?  It looks like it's in RAM.

sure, but ANY call to ROM will fail. There is a huge hole:
vga bios calls pcibios to set BAR 10 to ffffffff

There is a huge window here: any call to ROM code will fail, so that
includes printk (we do this on each pcibios call), and just about
anything else.

So we have a problem with a fundamental design decision

ron

SimNOW VGA int 1a

[Myles Watson]

On Thu, Oct 16, 2008 at 1:32 PM, ron minnich  wrote:
> On Thu, Oct 16, 2008 at 12:30 PM, Myles Watson  wrote:
> > Wait a second.  The reason this is broken is that the code setting the
>
> PCI
> > decode register is in the ROM.  Can we fix this by calling
> > pci_conf1_write_config32 instead?  It looks like it's in RAM.
>
> sure, but ANY call to ROM will fail. There is a huge hole:
> vga bios calls pcibios to set BAR 10 to ffffffff
>
> There is a huge window here: any call to ROM code will fail, so that
> includes printk (we do this on each pcibios call), and just about
> anything else.
>
> So we have a problem with a fundamental design decision

All right.  I guess I go back to being a lurker for a while until it gets
worked out :)

I guess the beauty of this is that it will enforce clean separation between
the stages.

Myles

SimNOW VGA int 1a

[ron minnich]

On Thu, Oct 16, 2008 at 12:35 PM, Myles Watson  wrote:
> All right.  I guess I go back to being a lurker for a while until it gets
> worked out :)

Myles, you debugged it, you get to tell me how to fix it :-)

ron