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Hello all,
I cant get the reboot working. I have set CPU reboot to INIT in my SB, so INIT is generated when booting via KBD/92, Linuxbios will jump to real_main, same way as it boots from cold, but got freeze on setup_default_resource_map(); I'm using default usermap from K8, sometimes it writes more entries to 0:18.1 sometimes just first (the code which takes the resource table and simply do the pci writes, with correct and and or mask)
I dont know even if my code should reboot this way? But the devel guide from AMD suggest that this must be set up again. I dont know at all what is wrong?
The soft_reset is called from init_cpus, maybe too early for the NB?
Any help is kindly appreciated.
Other stuff is working fine, I'm using LB on daily use. Once reboot work I will release my KT890/VT8237 on Asus A8V-E SE mb LB code to public testing and review.
thanks,
Rudolf
Hi all,
Just an update to this problem, removing soft_reset in cpu_init module does not help. I added 1s delay before calling the setup_resource map, now it hangs when it writes third "line" of the the resource table. I dont think there is anything significant, yet I dont know what could be wrong that it will just hang up. The PCI writes are to device 18, this is inside a processor, and there is no need to have correctly setup the HT Link correct?
Any clue?
If someone needs additional info, I will provide that too.
Rudolf
boot log?
YH
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Hello,
Sorry for the delay, I moved to flat and got no internet for a while.
LinuxBIOS-2.0.0_Fallback Po zář 3 22:17:08 CEST 2007 starting...
now booting... fallback
LinuxBIOS-2.0.0_Normal Po zář 3 22:16:19 CEST 2007 starting...
now booting... real_main
INIT detected from ---- {APICID = 00 NODEID = 00 COREID = 00} ---
Issuing SOFT_RESET...
soft reset
soft reset done
now booting... after init_cpus
now booting... after udelay
now booting... bist
000c1044 <-00000000
000c104c <-00000001
000c1054 <-
This is my boot log when I type "reboot" from Linux. It seems chipset just sends INIT# to CPU. I could not force it to generate proper CPURST#. It seems there is some bit for that in SB but documentation is unclear (VT8237) I asked VIA recently, but still no answer.
To catch the log with my code:
w83627ehg_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
print_info("now booting... real_main\r\n");
if (bist == 0) {
//init_cpus(cpu_init_detectedx);
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
}
// enable_lapic();
init_timer();
print_info("now booting... after init_cpus\r\n");
mdelay(1000);
print_info("now booting... after udelay\r\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist); print_info("now booting... bist\r\n");
// setup_a8v_resource_map();
setup_default_resource_map();
print_info("now booting... resource map\r\n");
setup_coherent_ht_domain();
print_info("now booting... HT domain\r\n");
wait_all_core0_started();
print_info("now booting... Core0 started\r\n");
So the problem is with setup_default resource map... With the delay(1000) it will hang on the third write, without the delay it will hang in random place in the very same routine.
What is interesting if I reboot through undocumented 0xcf9 (already send some questions about this to VIA) I can go on at least to setup_coherent_ht_domain();
I dont know what might be wrong :/ My ROM strap for VIA chipset is not working (all registers gets filled with FF) correctly right now, but I dont think this should be a problem while rebooting??? I think HT Link is set up bit later....
My soft_reset routine just triggers PCI_RESET signal from SB.
I put online some log file of full boot and reboot tries at http://assembler.cz/lb there is also my mainboard specific code.
Thanks,
Rudolf
it seems your soft-reset never work...
YH
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yhlu wrote:
it seems your soft-reset never work...
You mean, the soft_reset should reset the CPU too? So never return?
Rudolf
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Rudolf Marek -
yhlu