r3144 build service

[coreboot information]

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "hailfinger" checked in revision 3144 to
the coreboot source repository and caused the following 
changes:

Change Log:
Prepare for ICH7/ICH8 SPI support by adding some debugging for all
ICH* chipsets. Functionality (except printing) should be unchanged.

Signed-off-by: Carl-Daniel Hailfinger

Ward says:
This code detects the ICH8 chipset on my laptop, and it appears to use
SPI.

Acked-by: Ward Vandewege

Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3144&device=serengeti_c...

If something broke during this checkin please be a pain 
in hailfinger's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

Best regards,
     coreboot automatic build system