zhu shi song wrote:
Where is work placed? Can you kindly send me for reference?
Look in northbridge/intel/440bx/raminit.inc
I have checked the value of (sdram type, row, col, bank ,side ) through post code(output to 0x80 port). They are all correct values. But I still can't use SDRAM on ECS P6STMT board.
Do you know what errors of original code have been corrected after using the new code? tks
If I remember correctly the page size and the ram boundrys were not being set correctly. The orginal RAM routines tried to set all the registers in one big loop so it was really hard to debug. I switced to the newer code since it did things one step at a time and would be easier to debug.
Switching had the side-effect of making things work so I didn't bother totaly figureing out what was wrong with the orginal code.