ASRock E350M1: `PCI: Static device PCI: 00:04.0 not found, disabling it.` despite vendor BIOS showing it
Dear coreboot folks,
the ASRock E350M1 [1] still has some issues and with the changes committed since May 2012 new ones have been introduced too and I am going to report them to the list one by one starting from the first issues reported in the coreboot log.
The following is reported with the vendor BIOS [2].
-[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-04.0-[01]-- +-11.0 1002:4391 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.1 1002:439c +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[02]-- +-14.5 1002:4399 +-15.0-[03]-- +-15.1-[04]----00.0 10ec:8168 +-16.0 1002:4397 +-16.2 1002:4396 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 -18.7 1022:1719
Running the board with coreboot (based on fdfd89f2 with [4] applied and debug messages) [3] PCI device 0:04.0 is not detected.
$ lspci -tnvv -[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-11.0 1002:4390 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[01]-- +-14.5 1002:4399 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 -18.7 1022:1719
This problem has been present since the beginning (at least confirmed with an image built from commit bdca153.
$ git show bdca153 commit bdca15337bc9337f399b43290dc74cb598c5ec4d Author: Nico Huber nico.huber@secunet.com Date: Mon May 21 14:01:52 2012 +0200
libpayload: Remove orphaned delay from USB mass storage
The coreboot log (attached) contains the following.
[…] Mainboard E350M1 Enable. scan_static_bus for Root Device setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000 setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002 setup_uma_memory: uma size 0x18000000, memory start 0xc8000000 CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled CPU_CLUSTER: 0 scanning... AP siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1022/1510] ops PCI: 00:00.0 [1022/1510] enabled PCI: 00:01.0 [1002/9802] enabled PCI: 00:01.1 [1002/1314] enabled PCI: Static device PCI: 00:04.0 not found, disabling it. sb800_enable SB800 - Smbus.c - alink_ab_indx - Start. SB800 - Smbus.c - alink_ab_indx - End. PCI: 00:11.0 [1002/4390] enabled sb800_enable PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb800_enable PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb800_enable PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb800_enable PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled […]
Any idea what might be wrong. The vendor BIOS says it is the following device.
00:04.0 PCI bridge: Advanced Micro Devices [AMD] Family 14h Processor Root Port (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00001000-00001fff Memory behind bridge: d0100000-d02fffff Prefetchable memory behind bridge: 00000000d0300000-00000000d04fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #247, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep+ BwNot+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise- Slot #4, PowerLimit 75.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [b0] Subsystem: Advanced Micro Devices [AMD] Device 1234 Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Kernel driver in use: pcieport 00: 22 10 12 15 07 00 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 11 11 00 00 20: 10 d0 20 d0 31 d0 41 d0 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 10 00
Any ideas are appreciated.
Thanks,
Paul
[1] http://www.coreboot.org/ASRock_E350M1 [2] http://www.coreboot.org/File:ASRock_E350M1_info_dump.tar.bz2 [3] http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=fdfd89f21326f13a... [4] http://review.coreboot.org/#/c/2536/
Paul, What PCIe device is attached to that bridge? I checked the devicetree.cb for any comments of what it might be but didn't see any.
Thanks, Dave
----- Original Message -----
From: "Paul Menzel" paulepanter@users.sourceforge.net To: coreboot@coreboot.org Sent: Thursday, February 28, 2013 6:51:26 AM Subject: [coreboot] ASRock E350M1: `PCI: Static device PCI: 00:04.0 not found, disabling it.` despite vendor BIOS showing it
Dear coreboot folks,
the ASRock E350M1 [1] still has some issues and with the changes committed since May 2012 new ones have been introduced too and I am going to report them to the list one by one starting from the first issues reported in the coreboot log.
The following is reported with the vendor BIOS [2].
-[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-04.0-[01]-- +-11.0 1002:4391 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.1 1002:439c +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[02]-- +-14.5 1002:4399 +-15.0-[03]-- +-15.1-[04]----00.0 10ec:8168 +-16.0 1002:4397 +-16.2 1002:4396 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 \-18.7 1022:1719Running the board with coreboot (based on fdfd89f2 with [4] applied and debug messages) [3] PCI device 0:04.0 is not detected.
$ lspci -tnvv -[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-11.0 1002:4390 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[01]-- +-14.5 1002:4399 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 \-18.7 1022:1719This problem has been present since the beginning (at least confirmed with an image built from commit bdca153.
$ git show bdca153 commit bdca15337bc9337f399b43290dc74cb598c5ec4d Author: Nico Huber <nico.huber@secunet.com> Date: Mon May 21 14:01:52 2012 +0200 libpayload: Remove orphaned delay from USB mass storageThe coreboot log (attached) contains the following.
[…] Mainboard E350M1 Enable. scan_static_bus for Root Device setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000 setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002 setup_uma_memory: uma size 0x18000000, memory start 0xc8000000 CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled CPU_CLUSTER: 0 scanning... AP siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1022/1510] ops PCI: 00:00.0 [1022/1510] enabled PCI: 00:01.0 [1002/9802] enabled PCI: 00:01.1 [1002/1314] enabled PCI: Static device PCI: 00:04.0 not found, disabling it. sb800_enable SB800 - Smbus.c - alink_ab_indx - Start. SB800 - Smbus.c - alink_ab_indx - End. PCI: 00:11.0 [1002/4390] enabled sb800_enable PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb800_enable PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb800_enable PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb800_enable PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled […]Any idea what might be wrong. The vendor BIOS says it is the following device.
00:04.0 PCI bridge: Advanced Micro Devices [AMD] Family 14h Processor Root Port (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00001000-00001fff Memory behind bridge: d0100000-d02fffff Prefetchable memory behind bridge: 00000000d0300000-00000000d04fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #247, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep+ BwNot+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise- Slot #4, PowerLimit 75.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [b0] Subsystem: Advanced Micro Devices [AMD] Device 1234 Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Kernel driver in use: pcieport 00: 22 10 12 15 07 00 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 11 11 00 00 20: 10 d0 20 d0 31 d0 41 d0 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 10 00Any ideas are appreciated.
Thanks,
Paul
[1] http://www.coreboot.org/ASRock_E350M1 [2] http://www.coreboot.org/File:ASRock_E350M1_info_dump.tar.bz2 [3] http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=fdfd89f21326f13a... [4] http://review.coreboot.org/#/c/2536/
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Dear Dave,
thank you for your answer and thank you for putting me in CC too, as currently coreboot messages are not delivered to my account. :(
Am Donnerstag, den 28.02.2013, 09:14 -0600 schrieb Dave Frodin:
What PCIe device is attached to that bridge?
There are no devices attached, as far as I know.
I checked the devicetree.cb for any comments of what it might be but didn't see any.
I just have the `lspci -tnvv` output of the proprietary vendor BIOS, which lists this.
-[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-04.0-[01]-- +-11.0 1002:4391 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.1 1002:439c +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[02]-- +-14.5 1002:4399 +-15.0-[03]-- +-15.1-[04]----00.0 10ec:8168 +-16.0 1002:4397 +-16.2 1002:4396 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 \-18.7 1022:1719
The ASRock E350M1 only has one PCI Express slot [5], but I am not sure after what PCI device its bus is on.
So coreboot could be right and the vendor BIOS wrong?
Thanks,
Paul
Dear coreboot folks,
Am Freitag, den 01.03.2013, 01:03 +0100 schrieb Paul Menzel:
[…]
Am Donnerstag, den 28.02.2013, 09:14 -0600 schrieb Dave Frodin:
What PCIe device is attached to that bridge?
There are no devices attached, as far as I know.
I checked the devicetree.cb for any comments of what it might be but didn't see any.
I just have the `lspci -tnvv` output of the proprietary vendor BIOS, which lists this.
-[0000:00]-+-00.0 1022:1510 +-01.0 1002:9802 +-01.1 1002:1314 +-04.0-[01]-- +-11.0 1002:4391 +-12.0 1002:4397 +-12.2 1002:4396 +-13.0 1002:4397 +-13.2 1002:4396 +-14.0 1002:4385 +-14.1 1002:439c +-14.2 1002:4383 +-14.3 1002:439d +-14.4-[02]-- +-14.5 1002:4399 +-15.0-[03]-- +-15.1-[04]----00.0 10ec:8168 +-16.0 1002:4397 +-16.2 1002:4396 +-18.0 1022:1700 +-18.1 1022:1701 +-18.2 1022:1702 +-18.3 1022:1703 +-18.4 1022:1704 +-18.5 1022:1718 +-18.6 1022:1716 \-18.7 1022:1719The ASRock E350M1 only has one PCI Express slot [5], but I am not sure after what PCI device its bus is on.
putting a AMD/ATI PCIe graphics card into the PCIe slot to look into [6], it looks like strangely it is hooked up behind 00:04.0.
PCI: dev == PCI: 00:04.0 PCI: in pci_probe_dev PCI: pci_probe_dev: PCI_VENDOR_ID: id = 0x15121022, PCI: 00:04.0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:04.0 subordinate bus PCI Express PCI: 00:04.0 [1022/1512] enabled PCI: after `dev = pci_probe_dev(dev, bus, devfn);` PCI: dev == PCI: 00:04.0 PCI: dev PCI: 00:04.0 no multi function device PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` PCI: dev == PCI: 00:05.0
At least now the PCI device is enabled. It is strange, as according to the `lspci` of the proprietary vendor BIOS [7]
[…] 00:04.0 PCI bridge: Advanced Micro Devices [AMD] Family 14h Processor Root Port […] 00:15.0 PCI bridge: Advanced Micro Devices [AMD] nee ATI SB700/SB800/SB900 PCI to PCI bridge (PCIE port 0) 00:15.1 PCI bridge: Advanced Micro Devices [AMD] nee ATI SB700/SB800/SB900 PCI to PCI bridge (PCIE port 1) […] 04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 06)
So coreboot could be right and the vendor BIOS wrong?
So coreboot seems to have issues. Unfortunately I am not sure what to make out of this. Looking at the AMD SB800-Series Southbridges Register Programming Requirements Rev. 3.02 [8][9], I did not find anything about PCI device 00:04.0. Though reading
Family 14h Processor Root Port
and looking at `devicetree.cb` again it looks like this is part of the Fam14 processor/northbridge(?). Quoting from 2.1 Processor Overview from BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Processors Rev 3.13 [10][11]:
The processor is a package that contains (1) one to two cores, (2) one PCIe® root complex with generation 2 link support, (3) one 64-bit DDR3 interface for communication to system memory, and (4) one communication packet routing block referred to as the northbridge (NB).
The PCI devices(?) are described in section 2.11 Root complex on page 118.
Does anyone remember having problems with that?
When plugging in the graphics card, the GRUB screen is garbled and Linux does not even boot and fails with the following error message.
00:01.0: no compatible bridge window for [mem 0xd0000000-0xdfffffff pref]
Thanks,
Paul
[6] http://review.coreboot.org/#/c/2562/ (see review comments) [7] http://www.computerbase.de/forum/showthread.php?t=1124569 [8] http://www.coreboot.org/Datasheets#AMD_SB800 [9] http://support.amd.com/us/Embedded_TechDocs/45481.pdf [10] http://www.coreboot.org/Datasheets#AMD_Fam14 [11] http://support.amd.com/us/Embedded_TechDocs/43170.pdf
Here is the diff.
$ diff -u 20130308--minicom--master--debug--pcie-card*.log --- 20130308--minicom--master--debug--pcie-card.log 2013-03-08 11:47:34.000000000 +0100 +++ 20130308--minicom--master--debug--pcie-card-without.log 2013-03-08 11:48:45.000000000 +0100 @@ -205,19 +205,45 @@ PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` PCI: dev == PCI: 00:04.0 PCI: in pci_probe_dev -PCI: pci_probe_dev: PCI_VENDOR_ID: id = 0x15121022, PCI: 00:04.0 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -Capability: type 0x05 @ 0xa0 -Capability: type 0x0d @ 0xb0 -Capability: type 0x08 @ 0xb8 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -PCI: 00:04.0 subordinate bus PCI Express -PCI: 00:04.0 [1022/1512] enabled +PCI: pci_probe_dev: PCI_VENDOR_ID: id = 0xffffffff, PCI: 00:04.0 +PCI: Static device PCI: 00:04.0 not found, disabling it. PCI: after `dev = pci_probe_dev(dev, bus, devfn);` PCI: dev == PCI: 00:04.0 -PCI: dev PCI: 00:04.0 no multi function device +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL +PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` +PCI: dev == NULL +PCI: in pci_probe_dev +PCI: after `dev = pci_probe_dev(dev, bus, devfn);` +PCI: dev == NULL PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` PCI: dev == PCI: 00:05.0 PCI: in pci_probe_dev @@ -882,246 +908,6 @@ PCI: 00:15.2 PCI: 00:15.3 PCI: Check your devicetree.cb. -do_pci_scan_bridge for PCI: 00:04.0 -PCI: pci_scan_bus for bus 01 -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: 01:00.0 [1002/68f9] enabled -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == PCI: 01:00.0 -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: 01:00.1 [1002/aa68] enabled -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == PCI: 01:00.1 -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` -PCI: dev == NULL -PCI: in pci_probe_dev -PCI: after `dev = pci_probe_dev(dev, bus, devfn);` -PCI: dev == NULL -PCI: dev <null> no multi function device -PCI: pci_scan_bus returning with max=001 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -Capability: type 0x01 @ 0x50 -Capability: type 0x10 @ 0x58 -do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:14.3 PNP: 002e.0 disabled PNP: 002e.1 disabled @@ -1136,7 +922,7 @@ PNP: 002e.b enabled scan_static_bus for PCI: 00:14.3 done do_pci_scan_bridge for PCI: 00:14.4 -PCI: pci_scan_bus for bus 02 +PCI: pci_scan_bus for bus 01 PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` PCI: dev == NULL PCI: in pci_probe_dev @@ -1329,10 +1115,10 @@ PCI: after `dev = pci_probe_dev(dev, bus, devfn);` PCI: dev == NULL PCI: dev <null> no multi function device -PCI: pci_scan_bus returning with max=002 -do_pci_scan_bridge returns max 2 +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 do_pci_scan_bridge for PCI: 00:15.0 -PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus for bus 02 PCI: after `dev = pci_scan_get_dev(&old_devices, devfn);` PCI: dev == NULL PCI: in pci_probe_dev @@ -1525,13 +1311,12 @@ PCI: after `dev = pci_probe_dev(dev, bus, devfn);` PCI: dev == NULL PCI: dev <null> no multi function device -PCI: pci_scan_bus returning with max=003 -do_pci_scan_bridge returns max 3 -PCI: pci_scan_bus returning with max=003 +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +PCI: pci_scan_bus returning with max=002 scan_static_bus for Root Device done done found VGA at PCI: 00:01.0 -found VGA at PCI: 01:00.0 Setting up VGA for PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device @@ -1547,8 +1332,6 @@ DOMAIN: 0000 read_resources bus 0 link: 0
Fam14h - nb_read_resources -PCI: 00:04.0 read_resources bus 1 link: 0 -PCI: 00:04.0 read_resources bus 1 link: 0 done PCI: 00:14.0 read_resources bus 0 link: 0 I2C: 00:50 missing read_resources I2C: 00:51 missing read_resources @@ -1557,13 +1340,13 @@ SB800 - Lpc.c - lpc_read_resources - End. PCI: 00:14.3 read_resources bus 0 link: 0 PCI: 00:14.3 read_resources bus 0 link: 0 done -PCI: 00:14.4 read_resources bus 2 link: 0 -PCI: 00:14.4 read_resources bus 2 link: 0 done +PCI: 00:14.4 read_resources bus 1 link: 0 +PCI: 00:14.4 read_resources bus 1 link: 0 done PCI: 00:15.0 register 10(ffffffff), read-only ignoring it PCI: 00:15.0 register 14(ffffffff), read-only ignoring it PCI: 00:15.0 register 38(ffffffff), read-only ignoring it -PCI: 00:15.0 read_resources bus 3 link: 0 -PCI: 00:15.0 read_resources bus 3 link: 0 done +PCI: 00:15.0 read_resources bus 2 link: 0 +PCI: 00:15.0 read_resources bus 2 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. @@ -1583,17 +1366,7 @@ PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18 PCI: 00:01.1 PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 - PCI: 00:04.0 child on link 0 PCI: 01:00.0 - PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c - PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 - PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 - PCI: 01:00.0 - PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10 - PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 18 - PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20 - PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 - PCI: 01:00.1 - PCI: 01:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 @@ -1674,46 +1447,32 @@ PCI: 00:18.6 PCI: 00:18.7 DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff -PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff -PCI: 01:00.0 20 * [0x0 - 0xff] io -PCI: 00:04.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done -PCI: 00:04.0 1c * [0x0 - 0xfff] io -PCI: 00:01.0 14 * [0x1000 - 0x10ff] io -PCI: 00:11.0 20 * [0x1400 - 0x140f] io -PCI: 00:11.0 10 * [0x1410 - 0x1417] io -PCI: 00:11.0 18 * [0x1418 - 0x141f] io -PCI: 00:11.0 14 * [0x1420 - 0x1423] io -PCI: 00:11.0 1c * [0x1424 - 0x1427] io -DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done +PCI: 00:01.0 14 * [0x0 - 0xff] io +PCI: 00:11.0 20 * [0x400 - 0x40f] io +PCI: 00:11.0 10 * [0x410 - 0x417] io +PCI: 00:11.0 18 * [0x418 - 0x41f] io +PCI: 00:11.0 14 * [0x420 - 0x423] io +PCI: 00:11.0 1c * [0x424 - 0x427] io +DOMAIN: 0000 compute_resources_io: base: 428 size: 428 align: 8 gran: 0 limit: ffff done DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff -PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff -PCI: 01:00.0 10 * [0x0 - 0xfffffff] prefmem -PCI: 00:04.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff done -PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff -PCI: 01:00.0 18 * [0x0 - 0x1ffff] mem -PCI: 01:00.0 30 * [0x20000 - 0x3ffff] mem -PCI: 01:00.1 10 * [0x40000 - 0x43fff] mem -PCI: 00:04.0 compute_resources_mem: base: 44000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem -PCI: 00:04.0 24 * [0x10000000 - 0x1fffffff] prefmem -PCI: 00:04.0 20 * [0x20000000 - 0x200fffff] mem -PCI: 00:01.0 18 * [0x20100000 - 0x2013ffff] mem -PCI: 00:01.1 10 * [0x20140000 - 0x20143fff] mem -PCI: 00:14.2 10 * [0x20144000 - 0x20147fff] mem -PCI: 00:12.0 10 * [0x20148000 - 0x20148fff] mem -PCI: 00:13.0 10 * [0x20149000 - 0x20149fff] mem -PCI: 00:14.5 10 * [0x2014a000 - 0x2014afff] mem -PCI: 00:11.0 24 * [0x2014b000 - 0x2014b3ff] mem -PCI: 00:12.2 10 * [0x2014b400 - 0x2014b4ff] mem -PCI: 00:13.2 10 * [0x2014b500 - 0x2014b5ff] mem -PCI: 00:14.3 a0 * [0x2014b600 - 0x2014b600] mem -DOMAIN: 0000 compute_resources_mem: base: 2014b601 size: 2014b601 align: 28 gran: 0 limit: ffffffff done +PCI: 00:01.0 18 * [0x10000000 - 0x1003ffff] mem +PCI: 00:01.1 10 * [0x10040000 - 0x10043fff] mem +PCI: 00:14.2 10 * [0x10044000 - 0x10047fff] mem +PCI: 00:12.0 10 * [0x10048000 - 0x10048fff] mem +PCI: 00:13.0 10 * [0x10049000 - 0x10049fff] mem +PCI: 00:14.5 10 * [0x1004a000 - 0x1004afff] mem +PCI: 00:11.0 24 * [0x1004b000 - 0x1004b3ff] mem +PCI: 00:12.2 10 * [0x1004b400 - 0x1004b4ff] mem +PCI: 00:13.2 10 * [0x1004b500 - 0x1004b5ff] mem +PCI: 00:14.3 a0 * [0x1004b600 - 0x1004b600] mem +DOMAIN: 0000 compute_resources_mem: base: 1004b601 size: 1004b601 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff @@ -1721,9 +1480,6 @@ constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 00:01.1 -constrain_resources: PCI: 00:04.0 -constrain_resources: PCI: 01:00.0 -constrain_resources: PCI: 01:00.1 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.2 @@ -1754,43 +1510,29 @@ avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit f7ffffff Setting resources... -DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff -Assigned: PCI: 00:04.0 1c * [0x1000 - 0x1fff] io -Assigned: PCI: 00:01.0 14 * [0x2000 - 0x20ff] io -Assigned: PCI: 00:11.0 20 * [0x2400 - 0x240f] io -Assigned: PCI: 00:11.0 10 * [0x2410 - 0x2417] io -Assigned: PCI: 00:11.0 18 * [0x2418 - 0x241f] io -Assigned: PCI: 00:11.0 14 * [0x2420 - 0x2423] io -Assigned: PCI: 00:11.0 1c * [0x2424 - 0x2427] io -DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done -PCI: 00:04.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff -Assigned: PCI: 01:00.0 20 * [0x1000 - 0x10ff] io -PCI: 00:04.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_io: base:1000 size:428 align:8 gran:0 limit:ffff +Assigned: PCI: 00:01.0 14 * [0x1000 - 0x10ff] io +Assigned: PCI: 00:11.0 20 * [0x1400 - 0x140f] io +Assigned: PCI: 00:11.0 10 * [0x1410 - 0x1417] io +Assigned: PCI: 00:11.0 18 * [0x1418 - 0x141f] io +Assigned: PCI: 00:11.0 14 * [0x1420 - 0x1423] io +Assigned: PCI: 00:11.0 1c * [0x1424 - 0x1427] io +DOMAIN: 0000 allocate_resources_io: next_base: 1428 size: 428 align: 8 gran: 0 done PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done -DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:2014b601 align:28 gran:0 limit:f7ffffff -Assigned: PCI: 00:01.0 10 * [0xd0000000 - 0xdfffffff] prefmem -Assigned: PCI: 00:04.0 24 * [0xe0000000 - 0xefffffff] prefmem -Assigned: PCI: 00:04.0 20 * [0xf0000000 - 0xf00fffff] mem -Assigned: PCI: 00:01.0 18 * [0xf0100000 - 0xf013ffff] mem -Assigned: PCI: 00:01.1 10 * [0xf0140000 - 0xf0143fff] mem -Assigned: PCI: 00:14.2 10 * [0xf0144000 - 0xf0147fff] mem -Assigned: PCI: 00:12.0 10 * [0xf0148000 - 0xf0148fff] mem -Assigned: PCI: 00:13.0 10 * [0xf0149000 - 0xf0149fff] mem -Assigned: PCI: 00:14.5 10 * [0xf014a000 - 0xf014afff] mem -Assigned: PCI: 00:11.0 24 * [0xf014b000 - 0xf014b3ff] mem -Assigned: PCI: 00:12.2 10 * [0xf014b400 - 0xf014b4ff] mem -Assigned: PCI: 00:13.2 10 * [0xf014b500 - 0xf014b5ff] mem -Assigned: PCI: 00:14.3 a0 * [0xf014b600 - 0xf014b600] mem -DOMAIN: 0000 allocate_resources_mem: next_base: f014b601 size: 2014b601 align: 28 gran: 0 done -PCI: 00:04.0 allocate_resources_prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:f7ffffff -Assigned: PCI: 01:00.0 10 * [0xe0000000 - 0xefffffff] prefmem -PCI: 00:04.0 allocate_resources_prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done -PCI: 00:04.0 allocate_resources_mem: base:f0000000 size:100000 align:20 gran:20 limit:f7ffffff -Assigned: PCI: 01:00.0 18 * [0xf0000000 - 0xf001ffff] mem -Assigned: PCI: 01:00.0 30 * [0xf0020000 - 0xf003ffff] mem -Assigned: PCI: 01:00.1 10 * [0xf0040000 - 0xf0043fff] mem -PCI: 00:04.0 allocate_resources_mem: next_base: f0044000 size: 100000 align: 20 gran: 20 done +DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1004b601 align:28 gran:0 limit:f7ffffff +Assigned: PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem +Assigned: PCI: 00:01.0 18 * [0xf0000000 - 0xf003ffff] mem +Assigned: PCI: 00:01.1 10 * [0xf0040000 - 0xf0043fff] mem +Assigned: PCI: 00:14.2 10 * [0xf0044000 - 0xf0047fff] mem +Assigned: PCI: 00:12.0 10 * [0xf0048000 - 0xf0048fff] mem +Assigned: PCI: 00:13.0 10 * [0xf0049000 - 0xf0049fff] mem +Assigned: PCI: 00:14.5 10 * [0xf004a000 - 0xf004afff] mem +Assigned: PCI: 00:11.0 24 * [0xf004b000 - 0xf004b3ff] mem +Assigned: PCI: 00:12.2 10 * [0xf004b400 - 0xf004b4ff] mem +Assigned: PCI: 00:13.2 10 * [0xf004b500 - 0xf004b5ff] mem +Assigned: PCI: 00:14.3 a0 * [0xf004b600 - 0xf004b600] mem +DOMAIN: 0000 allocate_resources_mem: next_base: f004b601 size: 1004b601 align: 28 gran: 0 done PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff @@ -1802,10 +1544,10 @@ adsr: (before) basek = 0, limitk = 21effffff. adsr: (after) basek = 0, limitk = 87bfff, sizek = 87c000. adsr - 0xa0000 to 0xbffff resource. -adsr: mmio_basek=00340000, basek=00000300, limitk=0087bfff +adsr: mmio_basek=00380000, basek=00000300, limitk=0087bfff split: 128K table at =c7fe0000 -0: mmio_basek=00340000, basek=00400000, limitk=0087bfff - adsr - mmio_basek = 340000. +0: mmio_basek=00380000, basek=00400000, limitk=0087bfff + adsr - mmio_basek = 380000. adsr - high_tables_size = 20000. DOMAIN: 0000 assign_resources, bus 0 link: 0
@@ -1815,33 +1557,23 @@
Fam14h - set_resource PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig> -PCI: 00:01.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem -PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io -PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem -PCI: 00:01.1 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e mem -PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io -PCI: 00:04.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem -PCI: 00:04.0 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 mem -PCI: 00:04.0 assign_resources, bus 1 link: 0 -PCI: 01:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 -PCI: 01:00.0 18 <- [0x00f0000000 - 0x00f001ffff] size 0x00020000 gran 0x11 mem64 -PCI: 01:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io -PCI: 01:00.0 30 <- [0x00f0020000 - 0x00f003ffff] size 0x00020000 gran 0x11 romem -PCI: 01:00.1 10 <- [0x00f0040000 - 0x00f0043fff] size 0x00004000 gran 0x0e mem64 -PCI: 00:04.0 assign_resources, bus 1 link: 0 -PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io -PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io -PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io -PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io -PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io -PCI: 00:11.0 24 <- [0x00f014b000 - 0x00f014b3ff] size 0x00000400 gran 0x0a mem -PCI: 00:12.0 10 <- [0x00f0148000 - 0x00f0148fff] size 0x00001000 gran 0x0c mem -PCI: 00:12.2 10 <- [0x00f014b400 - 0x00f014b4ff] size 0x00000100 gran 0x08 mem -PCI: 00:13.0 10 <- [0x00f0149000 - 0x00f0149fff] size 0x00001000 gran 0x0c mem -PCI: 00:13.2 10 <- [0x00f014b500 - 0x00f014b5ff] size 0x00000100 gran 0x08 mem -PCI: 00:14.2 10 <- [0x00f0144000 - 0x00f0147fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem +PCI: 00:01.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 18 <- [0x00f0000000 - 0x00f003ffff] size 0x00040000 gran 0x12 mem +PCI: 00:01.1 10 <- [0x00f0040000 - 0x00f0043fff] size 0x00004000 gran 0x0e mem +PCI: 00:11.0 10 <- [0x0000001410 - 0x0000001417] size 0x00000008 gran 0x03 io +PCI: 00:11.0 14 <- [0x0000001420 - 0x0000001423] size 0x00000004 gran 0x02 io +PCI: 00:11.0 18 <- [0x0000001418 - 0x000000141f] size 0x00000008 gran 0x03 io +PCI: 00:11.0 1c <- [0x0000001424 - 0x0000001427] size 0x00000004 gran 0x02 io +PCI: 00:11.0 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io +PCI: 00:11.0 24 <- [0x00f004b000 - 0x00f004b3ff] size 0x00000400 gran 0x0a mem +PCI: 00:12.0 10 <- [0x00f0048000 - 0x00f0048fff] size 0x00001000 gran 0x0c mem +PCI: 00:12.2 10 <- [0x00f004b400 - 0x00f004b4ff] size 0x00000100 gran 0x08 mem +PCI: 00:13.0 10 <- [0x00f0049000 - 0x00f0049fff] size 0x00001000 gran 0x0c mem +PCI: 00:13.2 10 <- [0x00f004b500 - 0x00f004b5ff] size 0x00000100 gran 0x08 mem +PCI: 00:14.2 10 <- [0x00f0044000 - 0x00f0047fff] size 0x00004000 gran 0x0e mem64 SB800 - Lpc.c - lpc_set_resources - Start. -PCI: 00:14.3 a0 <- [0x00f014b602 - 0x00f014b602] size 0x00000001 gran 0x00 mem +PCI: 00:14.3 a0 <- [0x00f004b602 - 0x00f004b602] size 0x00000001 gran 0x00 mem PCI: 00:14.3 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq @@ -1853,10 +1585,10 @@ PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq PCI: 00:14.3 assign_resources, bus 0 link: 0 SB800 - Lpc.c - lpc_set_resources - End. -PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io -PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem -PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem -PCI: 00:14.5 10 <- [0x00f014a000 - 0x00f014afff] size 0x00001000 gran 0x0c mem +PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io +PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem +PCI: 00:14.5 10 <- [0x00f004a000 - 0x00f004afff] size 0x00001000 gran 0x0c mem DOMAIN: 0000 assign_resources, bus 0 link: 0 adsr - leaving this lovely routine. Root Device assign_resources, bus 0 link: 0 @@ -1867,58 +1599,48 @@ APIC: 00 APIC: 01 DOMAIN: 0000 child on link 0 PCI: 00:00.0 - DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000 - DOMAIN: 0000 resource base d0000000 size 2014b601 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 1000 size 428 align 8 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base e0000000 size 1004b601 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 - DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20 + DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20 DOMAIN: 0000 resource base 100000000 size 11efffc00 align 0 gran 0 limit 0 flags e0004200 index 30 DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0100200 index 7 PCI: 00:00.0 PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI: 00:01.0 - PCI: 00:01.0 resource base d0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10 - PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 - PCI: 00:01.0 resource base f0100000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18 + PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10 + PCI: 00:01.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 + PCI: 00:01.0 resource base f0000000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18 PCI: 00:01.1 - PCI: 00:01.1 resource base f0140000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10 - PCI: 00:04.0 child on link 0 PCI: 01:00.0 - PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c - PCI: 00:04.0 resource base e0000000 size 10000000 align 28 gran 20 limit f7ffffff flags 60081202 index 24 - PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20 - PCI: 01:00.0 - PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001201 index 10 - PCI: 01:00.0 resource base f0000000 size 20000 align 17 gran 17 limit f7ffffff flags 60000201 index 18 - PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 20 - PCI: 01:00.0 resource base f0020000 size 20000 align 17 gran 17 limit f7ffffff flags 60002200 index 30 - PCI: 01:00.1 - PCI: 01:00.1 resource base f0040000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10 + PCI: 00:01.1 resource base f0040000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10 + PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:11.0 - PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 - PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 - PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 - PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c - PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 - PCI: 00:11.0 resource base f014b000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24 + PCI: 00:11.0 resource base 1410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:11.0 resource base 1420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:11.0 resource base 1418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:11.0 resource base 1424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:11.0 resource base 1400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:11.0 resource base f004b000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24 PCI: 00:12.0 - PCI: 00:12.0 resource base f0148000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 + PCI: 00:12.0 resource base f0048000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:12.2 - PCI: 00:12.2 resource base f014b400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 + PCI: 00:12.2 resource base f004b400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 PCI: 00:13.0 - PCI: 00:13.0 resource base f0149000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 + PCI: 00:13.0 resource base f0049000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:13.2 - PCI: 00:13.2 resource base f014b500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 + PCI: 00:13.2 resource base f004b500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 PCI: 00:14.1 PCI: 00:14.2 - PCI: 00:14.2 resource base f0144000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10 + PCI: 00:14.2 resource base f0044000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 - PCI: 00:14.3 resource base f014b602 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0 + PCI: 00:14.3 resource base f004b602 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 @@ -1959,7 +1681,7 @@ PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:14.5 - PCI: 00:14.5 resource base f014a000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 + PCI: 00:14.5 resource base f004a000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:15.0 PCI: 00:16.0 PCI: 00:16.2 @@ -1984,8 +1706,6 @@ PCI: 00:01.0 cmd <- 07 PCI: 00:01.1 subsystem <- 1022/1510 PCI: 00:01.1 cmd <- 02 -PCI: 00:04.0 bridge ctrl <- 0003 -PCI: 00:04.0 cmd <- 07 PCI: 00:11.0 subsystem <- 1022/1510 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 subsystem <- 1022/1510 @@ -2026,8 +1746,6 @@ PCI: 00:18.6 cmd <- 00 PCI: 00:18.7 subsystem <- 1022/1510 PCI: 00:18.7 cmd <- 00 -PCI: 01:00.0 cmd <- 03 -PCI: 01:00.1 cmd <- 02 W83627HF HWM SMBus enabled done. Initializing devices... @@ -2076,7 +1794,7 @@ Setting up local apic... apic_id: 0x01 done. model_14_init done. CPU #1 initialized -All AP CPUs stopped (2220 loops) +All AP CPUs stopped (2219 loops) CPU1: stack: 00290000 - 002a0000, lowest used address 0029fdb8, stack used: 584 bytes PCI: 00:00.0 init Northbridge init @@ -2097,8 +1815,6 @@ PCI: 00:18.5 init PCI: 00:18.6 init PCI: 00:18.7 init -PCI: 01:00.0 init -PCI: 01:00.1 init PNP: 002e.2 init PNP: 002e.5 init PNP: 002e.a init @@ -2120,7 +1836,7 @@ PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:01.1: enabled 1 -PCI: 00:04.0: enabled 1 +PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 @@ -2164,8 +1880,6 @@ PCI: 00:18.6: enabled 1 PCI: 00:18.7: enabled 1 APIC: 01: enabled 1 -PCI: 01:00.0: enabled 1 -PCI: 01:00.1: enabled 1 Re-Initializing CBMEM area to 0xc7fe0000 Initializing CBMEM area to 0xc7fe0000 (131072 bytes) dword=c7fe0000 @@ -2182,10 +1896,10 @@ Adding CBMEM entry as no. 2 Writing IRQ routing tables to 0xc7fe0400...write_pirq_routing_table done. PIRQ table: 48 bytes. -Wrote the mp table end at: 000f0410 - 000f051c +Wrote the mp table end at: 000f0410 - 000f0514 Adding CBMEM entry as no. 3 -Wrote the mp table end at: c7fe1410 - c7fe151c -MP table: 284 bytes. +Wrote the mp table end at: c7fe1410 - c7fe1514 +MP table: 276 bytes. Adding CBMEM entry as no. 4 ACPI: Writing ACPI tables at c7fe2400... ACPI: * DSDT at c7fe24c8 @@ -2264,8 +1978,6 @@ PCI: 00:18.6 (AMD Family 14h Northbridge) PCI: 00:18.7 (AMD Family 14h Northbridge) APIC: 01 (unknown) -PCI: 01:00.0 (unknown) -PCI: 01:00.1 (unknown) SMBIOS tables: 275 bytes. Adding CBMEM entry as no. 6 Writing high table forward entry at 0x00000500 @@ -2284,7 +1996,7 @@ 4. 00000000c8000000-00000000dfffffff: RESERVED 5. 00000000f8000000-00000000f8ffffff: RESERVED 6. 0000000100000000-000000021efffbff: RAM -Wrote coreboot table at: c7fee000, 0x200 bytes, checksum eeed +Wrote coreboot table at: c7fee000, 0x200 bytes, checksum a9e7 coreboot table: 536 bytes. Multiboot Information structure has been written. 0. FREE SPACE c7ff6000 0000a000 @@ -2329,7 +2041,7 @@ Relocating init from 0x000e7c69 to 0xc7fc6070 (size 40559) Found CBFS header at 0xfffffbf0 CPU Mhz=1601 -Found 24 PCI devices (max PCI bus is 02) +Found 21 PCI devices (max PCI bus is 01) Found 2 cpu(s) max supported 2 cpu(s) Copying PIR from 0xc7fe0400 to 0x000fdbc0 Copying MPTABLE from 0xc7fe1400/c7fe1410 to 0x000fdaa0 @@ -2339,13 +2051,13 @@ Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version rel-1.7.2.1-0-g88cb66e-20130308_084801-myhostname) -EHCI init on dev 00:12.2 (regs=0xf014b420) -EHCI init on dev 00:13.2 (regs=0xf014b520) -OHCI init on dev 00:14.5 (regs=0xf014a000) +EHCI init on dev 00:12.2 (regs=0xf004b420) +EHCI init on dev 00:13.2 (regs=0xf004b520) +OHCI init on dev 00:14.5 (regs=0xf004a000) Found 0 lpt ports Found 1 serial ports -AHCI controller at 11.0, iobase f014b000, irq 0 -OHCI init on dev 00:12.0 (regs=0xf0148000) +AHCI controller at 11.0, iobase f004b000, irq 0 +OHCI init on dev 00:12.0 (regs=0xf0048000) Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 AHCI/0: registering: "AHCI/0: WDC WD20EARS-60MVWB0 ATA-8 Hard-Disk (1863 GiBytes)" Got ps2 nak (status=51) @@ -2372,6 +2084,3 @@ NULL Booting from Hard Disk... Booting from 0000:7c00 - -garbled screen for GRUB -00:01.0: no compatible bridge window for [mem 0xd0000000-0xdfffffff pref]
Anytime you see a difference in lspci like that you should be doing an lspci -H1
before you go further. Vendor BIOSes tend to report things strangely sometimes.
ron
-
Dave Frodin -
Paul Menzel -
ron minnich