ASRock E350M1: `PCI: Static device PCI: 00:04.0 not found, disabling it.` despite vendor BIOS showing it

[Paul Menzel]

Dear coreboot folks,

the ASRock E350M1 [1] still has some issues and with the changes
committed since May 2012 new ones have been introduced too and I am
going to report them to the list one by one starting from the first
issues reported in the coreboot log.

The following is reported with the vendor BIOS [2].

-[0000:00]-+-00.0  1022:1510
                   +-01.0  1002:9802
                   +-01.1  1002:1314
                   +-04.0-[01]--
                   +-11.0  1002:4391
                   +-12.0  1002:4397
                   +-12.2  1002:4396
                   +-13.0  1002:4397
                   +-13.2  1002:4396
                   +-14.0  1002:4385
                   +-14.1  1002:439c
                   +-14.2  1002:4383
                   +-14.3  1002:439d
                   +-14.4-[02]--
                   +-14.5  1002:4399
                   +-15.0-[03]--
                   +-15.1-[04]----00.0  10ec:8168
                   +-16.0  1002:4397
                   +-16.2  1002:4396
                   +-18.0  1022:1700
                   +-18.1  1022:1701
                   +-18.2  1022:1702
                   +-18.3  1022:1703
                   +-18.4  1022:1704
                   +-18.5  1022:1718
                   +-18.6  1022:1716
                   -18.7  1022:1719

Running the board with coreboot (based on fdfd89f2 with [4] applied and
debug messages) [3] PCI device 0:04.0 is not detected.

$ lspci -tnvv
        -[0000:00]-+-00.0  1022:1510
                   +-01.0  1002:9802
                   +-01.1  1002:1314
                   +-11.0  1002:4390
                   +-12.0  1002:4397
                   +-12.2  1002:4396
                   +-13.0  1002:4397
                   +-13.2  1002:4396
                   +-14.0  1002:4385
                   +-14.2  1002:4383
                   +-14.3  1002:439d
                   +-14.4-[01]--
                   +-14.5  1002:4399
                   +-18.0  1022:1700
                   +-18.1  1022:1701
                   +-18.2  1022:1702
                   +-18.3  1022:1703
                   +-18.4  1022:1704
                   +-18.5  1022:1718
                   +-18.6  1022:1716
                   -18.7  1022:1719

This problem has been present since the beginning (at least confirmed
with an image built from commit bdca153.

$ git show bdca153
        commit bdca15337bc9337f399b43290dc74cb598c5ec4d
        Author: Nico Huber 
        Date:   Mon May 21 14:01:52 2012 +0200

libpayload: Remove orphaned delay from USB mass storage

The coreboot log (attached) contains the following.

[…]
        Mainboard E350M1 Enable.
        scan_static_bus for Root Device
        setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi =
        0x00000000
        setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi =
        0x00000002
        setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
        CPU_CLUSTER: 0 enabled
        DOMAIN: 0000 enabled
        CPU_CLUSTER: 0 scanning...
          AP siblings=1
        CPU: APIC: 00 enabled
        CPU: APIC: 01 enabled
        DOMAIN: 0000 scanning...
        PCI: pci_scan_bus for bus 00
        PCI: 00:00.0 [1022/1510] ops
        PCI: 00:00.0 [1022/1510] enabled
        PCI: 00:01.0 [1002/9802] enabled
        PCI: 00:01.1 [1002/1314] enabled
        PCI: Static device PCI: 00:04.0 not found, disabling it.
        sb800_enable SB800 - Smbus.c - alink_ab_indx - Start.
        SB800 - Smbus.c - alink_ab_indx - End.
        PCI: 00:11.0 [1002/4390] enabled
        sb800_enable PCI: 00:12.0 [1002/4397] ops
        PCI: 00:12.0 [1002/4397] enabled
        sb800_enable PCI: 00:12.2 [1002/4396] ops
        PCI: 00:12.2 [1002/4396] enabled
        sb800_enable PCI: 00:13.0 [1002/4397] ops
        PCI: 00:13.0 [1002/4397] enabled
        sb800_enable PCI: 00:13.2 [1002/4396] ops
        PCI: 00:13.2 [1002/4396] enabled
        […]

Any idea what might be wrong. The vendor BIOS says it is the following
device.

00:04.0 PCI bridge: Advanced Micro Devices [AMD] Family 14h Processor Root Port (prog-if 00 [Normal decode])
        	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        	Latency: 0, Cache Line Size: 64 bytes
        	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        	I/O behind bridge: 00001000-00001fff
        	Memory behind bridge: d0100000-d02fffff
        	Prefetchable memory behind bridge: 00000000d0300000-00000000d04fffff
        	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
        	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
        		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        	Capabilities: [50] Power Management version 3
        		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
        		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        	Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00
        		DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
        			ExtTag+ RBE+ FLReset-
        		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
        			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
        			MaxPayload 128 bytes, MaxReadReq 512 bytes
        		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
        		LnkCap:	Port #247, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <64ns, L1 <1us
        			ClockPM- Surprise- LLActRep+ BwNot+
        		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
        			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
        		LnkSta:	Speed unknown, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
        			Slot #4, PowerLimit 75.000W; Interlock- NoCompl+
        		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
        			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
        		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
        			Changed: MRL- PresDet- LinkState-
        		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
        		RootCap: CRSVisible-
        		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
        		DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ ARIFwd-
        		DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis- ARIFwd-
        		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
        			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
        			 Compliance De-emphasis: -6dB
        		LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
        			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
        	Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
        		Address: 0000000000000000  Data: 0000
        	Capabilities: [b0] Subsystem: Advanced Micro Devices [AMD] Device 1234
        	Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+
        	Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
        	Kernel driver in use: pcieport
        00: 22 10 12 15 07 00 10 00 00 00 04 06 10 00 01 00
        10: 00 00 00 00 00 00 00 00 00 01 01 00 11 11 00 00
        20: 10 d0 20 d0 31 d0 41 d0 00 00 00 00 00 00 00 00
        30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 10 00

Any ideas are appreciated.

Thanks,

Paul

[1] http://www.coreboot.org/ASRock_E350M1
[2] http://www.coreboot.org/File:ASRock_E350M1_info_dump.tar.bz2
[3] http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=fdfd89f21326f13a...
[4] http://review.coreboot.org/#/c/2536/