Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

[GARRETT DOORENBOS]

Hello,

I'm running coreboot on an Intel Atom Bay Trail based platform. When I turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the Intel FSP (it never returns) after a warm boot. The only way around it is a power cycle. Has anyone seen this before?

Thanks,
Garrett Doorenbos
Software Engineer - Almost Hardware

Office: 256.963.6369
Email: [e-mail]
Web: www.adtran.comhttp://s.bl-1.com/h/CoY1mz9?url=http://www.adtran.com

ADTRAN
901 Explorer Boulevard
Huntsville, AL 35806 - USA

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[Naveed Ghori]

Garrett,
I have seen this before. Details are probably in the coreboot list logs somewhere.
It basically would freeze on reboot and then after about 20s reset it self.
I have bypassed the issue without actually fixing it but forcing a CPU reset on reboot.

PS: I had disabled it to ensure that bios chip was not written to, so we can now do a verify on the whole chip.
Hope this helps.
Naveed

From: coreboot [mailto:[e-mail]] On Behalf Of GARRETT DOORENBOS
Sent: Tuesday, 12 December 2017 1:17 AM
To: [e-mail]
Subject: [coreboot] Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

Hello,

I'm running coreboot on an Intel Atom Bay Trail based platform. When I turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the Intel FSP (it never returns) after a warm boot. The only way around it is a power cycle. Has anyone seen this before?

Thanks,
Garrett Doorenbos
Software Engineer - Almost Hardware

Office: 256.963.6369
Email: [e-mail]
Web: www.adtran.comhttps://linkprotect.cudasvc.com/url?a=http://s.bl-1.com/h/CoY1mz9%3furl%3dhttp://www.adtran.com&c=E,1,2DSyxCwqxEyuAYzWqoL_8XrwwRvZGOfu7A9Ne0BEZTcWSRd9hjAVRj_oJEqZSjjv4vZxRfPxuDX7ILYejOVyBkMJoASQy3DQIIMw9dgQ6C_AzJib990,&typo=1

ADTRAN
901 Explorer Boulevard
Huntsville, AL 35806 - USA

[ADTRAN]https://linkprotect.cudasvc.com/url?a=http://s.bl-1.com/h/CoY1mz9%3furl%3dhttp://www.adtran.com&c=E,1,Fr-rPYRO5eeFxu_fXGE881ZIur_ANAqvAXduiqfKN1WHSi7RtnPhrxVQxp7Zv-VW_qIndoxYs1I1epoHnrOzZ0acQk9BCpNhXOQlyQS66CtX13X9-3k,&typo=1

[Nico Huber]

Hello Garrett,

On 11.12.2017 18:16, GARRETT DOORENBOS wrote:
> I'm running coreboot on an Intel Atom Bay Trail based platform. When I
> turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the Intel
> FSP (it never returns) after a warm boot. The only way around it is a
> power cycle. Has anyone seen this before?

AFAICS, the Bay Trail FSP doesn't have such an option. So it might be
the case that the binary always expects a non-volative cache. But that
is disabled in coreboot if you disable ENABLE_FSP_FAST_BOOT (by chance).
Intel is known to present options where only one value works.

The correct solution seems to be to always `select ENABLE_MRC_CACHE`
for fsp_baytrail and remove the related guards in its code. And hide
ENABLE_FSP_FAST_BOOT for fsp_baytrail because it just doesn't apply.

May I ask why you want to disable fast boot?

Hope that helps,
Nico
> Hello,
>
> Thanks,
> Garrett Doorenbos
> Software Engineer - Almost Hardware
>
> Office: 256.963.6369
> Email: [e-mail]
> Web: www.adtran.comhttp://s.bl-1.com/h/CoY1mz9?url=http://www.adtran.com
>
> ADTRAN
> 901 Explorer Boulevard
> Huntsville, AL 35806 - USA
>
> [ADTRAN]http://s.bl-1.com/h/CoY1mz9?url=http://www.adtran.com

[Naveed Ghori]

Nico,
I faced this same thing earlier I believe.
The reason I disabled it was to stop coreboot from writing to the flash chip. I was advised to turn off CONFIG_ENABLE_FSP_FAST_BOOT and this worked for the flash but had this side affect.

Garrett, Are you disabling it for the same reason?

Regards,
Naveed

-----Original Message-----
From: coreboot [mailto:[e-mail]] On Behalf Of Nico Huber
Sent: Wednesday, 13 December 2017 2:12 AM
To: GARRETT DOORENBOS; [e-mail]
Subject: Re: [coreboot] Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

Hello Garrett,

On 11.12.2017 18:16, GARRETT DOORENBOS wrote:
> I'm running coreboot on an Intel Atom Bay Trail based platform. When I 
> turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the 
> Intel FSP (it never returns) after a warm boot. The only way around it 
> is a power cycle. Has anyone seen this before?

AFAICS, the Bay Trail FSP doesn't have such an option. So it might be the case that the binary always expects a non-volative cache. But that is disabled in coreboot if you disable ENABLE_FSP_FAST_BOOT (by chance).
Intel is known to present options where only one value works.

The correct solution seems to be to always `select ENABLE_MRC_CACHE` for fsp_baytrail and remove the related guards in its code. And hide ENABLE_FSP_FAST_BOOT for fsp_baytrail because it just doesn't apply.

May I ask why you want to disable fast boot?

Hope that helps,
Nico
> Hello,
>
> Thanks,
> Garrett Doorenbos
> Software Engineer - Almost Hardware
>
> Office: 256.963.6369
> Email: 
> [e-mail]
> Web: 
> https://linkprotect.cudasvc.com/url?a=https://www.adtran.com&c=E,1,zia
> _2uPTk6eMKH9gxkBHCoibI9nwJEX2LFUylJISwIdygIKxKW7m9UY_xFRaUZNXqWJbsPdXa
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> NWye1btciSTvOOYIxQVfV-GDtWIzNVSVkhXlNoT7wIQGQEtnw,,&typo=1
>
> ADTRAN
> 901 Explorer Boulevard
> Huntsville, AL 35806 - USA
>
> [ADTRAN]https://linkprotect.cudasvc.com/url?a=http://s.bl-1.com/h/CoY
> 1mz9%3furl%3dhttp://www.adtran.com&c=E,1,ihpsTD49cQZcEW4B_7z9R-e0pweJL
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