When I use the seabios as the payload, I got a strange issue.
In the seabios flow:
Post->timer_setup->rtc_updating->inb_cmos function
when run the inb_cmos, it will reboot on the inb operation.
inb_cmos disassemables to fllowing:
out 0x70, value
in value, 0x71. ----> run here to make the reboot happen.
0x70 is the CMOS index port, 0x71 is the CMOS data port.
I suspect the "in value, 0x71" operation causes a exception and the seabios doesn't have real IDT, so it then make the reboot.
but why it cause the exception is a question for me?
since IO port 0x70 also reponsible for the NMI enble/disable, is it caused the error?
any one has some comments?
thanks
_________________________________________________________________ News, entertainment and everything you care about at Live.com. Get it now! http://www.live.com/getstarted.aspx
On Wed, Mar 04, 2009 at 10:15:21AM +0000, wei yang wrote:
When I use the seabios as the payload, I got a strange issue. In the seabios flow:
Post->timer_setup->rtc_updating->inb_cmos function
when run the inb_cmos, it will reboot on the inb operation.
inb_cmos disassemables to fllowing: out 0x70, value in value, 0x71. ----> run here to make the reboot happen.
0x70 is the CMOS index port, 0x71 is the CMOS data port.
I suspect the "in value, 0x71" operation causes a exception and the seabios doesn't have real IDT, so it then make the reboot.
but why it cause the exception is a question for me?
since IO port 0x70 also reponsible for the NMI enble/disable, is it caused the error?
I haven't seen this before. It would be odd for port 0x70 to control NMI, because it is usually used for rtc access.
-Kevin
Kevin O'Connor wrote:
On Wed, Mar 04, 2009 at 10:15:21AM +0000, wei yang wrote:
When I use the seabios as the payload, I got a strange issue. In the seabios flow:
Post->timer_setup->rtc_updating->inb_cmos function
when run the inb_cmos, it will reboot on the inb operation.
inb_cmos disassemables to fllowing: out 0x70, value in value, 0x71. ----> run here to make the reboot happen.
0x70 is the CMOS index port, 0x71 is the CMOS data port.
I suspect the "in value, 0x71" operation causes a exception and the seabios doesn't have real IDT, so it then make the reboot.
but why it cause the exception is a question for me?
since IO port 0x70 also reponsible for the NMI enble/disable, is it caused the error?
I haven't seen this before. It would be odd for port 0x70 to control NMI, because it is usually used for rtc access.
It's been this way since the IBM PC AT. If you write to 0x70 with bit 7 reset then you risk releasing any pending NMI. If the interrupt vectors are not initialised then you always need to set bit 7 when writing to 0x70.
Andrew
On Thu, Mar 05, 2009 at 10:12:58AM +0000, Andrew Goodbody wrote:
Kevin O'Connor wrote:
On Wed, Mar 04, 2009 at 10:15:21AM +0000, wei yang wrote:
since IO port 0x70 also reponsible for the NMI enble/disable, is it caused the error?
I haven't seen this before. It would be odd for port 0x70 to control NMI, because it is usually used for rtc access.
It's been this way since the IBM PC AT. If you write to 0x70 with bit 7 reset then you risk releasing any pending NMI. If the interrupt vectors are not initialised then you always need to set bit 7 when writing to 0x70.
Does the patch below stop the crash?
-Kevin
--- a/src/cmos.h +++ b/src/cmos.h @@ -56,14 +56,14 @@ static inline u8 inb_cmos(u8 reg) { - outb(reg, PORT_CMOS_INDEX); + outb(reg | 0x80, PORT_CMOS_INDEX); return inb(PORT_CMOS_DATA); }
static inline void outb_cmos(u8 val, u8 reg) { - outb(reg, PORT_CMOS_INDEX); + outb(reg | 0x80, PORT_CMOS_INDEX); outb(val, PORT_CMOS_DATA); }
-
Andrew Goodbody -
Kevin O'Connor -
wei yang