[v2][patch] add SMSC SCH3112 superio

[Chris Kilgour]

This trivial patch adds the SMSC SCH3112 superio chip ID to the generic 
SMSC support, and corrects a small typo.
With this patch, coreboot v2 on a mainboard with SCH3112 has been 
demonstrated to correctly use the serial port.  No other chip functions 
were tested.

Signed-off-by: Christopher Kilgour

[Carl-Daniel Hailfinger]

On 18.04.2008 18:32, Chris Kilgour wrote:
> This trivial patch adds the SMSC SCH3112 superio chip ID to the
> generic SMSC support, and corrects a small typo.
> With this patch, coreboot v2 on a mainboard with SCH3112 has been
> demonstrated to correctly use the serial port.  No other chip
> functions were tested.
>
> Signed-off-by: Christopher Kilgour

Nice! If you fix the whitespace issue below, the patch is
Acked-by: Carl-Daniel Hailfinger
> Index: src/superio/smsc/smscsuperio/superio.c
>
> --- src/superio/smsc/smscsuperio/superio.c	(revision 3241)
> +++ src/superio/smsc/smscsuperio/superio.c	(working copy)
> @@ -56,6 +56,7 @@
>  #define LPC47B397	0x6f
>  #define A8000		0x77	/* ASUS A8000, a rebranded DME1737(?) */
>  #define DME1737		0x78
> +#define SCH3112         0x7c
>  #define SCH5307		0x81	/* Rebranded LPC47B397(?) */
>
> /* Register defines */
> @@ -127,6 +128,7 @@
>    {LPC47B397,{0, 3, 4,  5, -1,  7, -1,  -1,  8,  -1, -1, -1, 10, -1, -1}},
>    {A8000,    {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
>    {DME1737,  {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
>    {SCH3112,  {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},

Whitespace damage. The other lines have a tab at the beginning, this
line has 8 spaces.
> {SCH5307,  {0, 3, 4,  5, -1,  7, -1,  -1,  8,  -1, -1, -1, 10, -1, -1}},
>  };
> Index: src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
>
> --- src/superio/smsc/smscsuperio/smscsuperio_early_serial.c	(revision 3241)
> +++ src/superio/smsc/smscsuperio/smscsuperio_early_serial.c	(working copy)
> @@ -30,7 +30,7 @@
> Enable the specified serial port.
> @param dev The device to use.
> @param dev The I/O base of the serial port (usually 0x3f8/0x2f8).
> @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
> */
>
> static inline void smscsuperio_enable_serial(device_t dev, uint16_t iobase)
>  {

[Uwe Hermann]

On Sat, Apr 19, 2008 at 04:10:39AM +0200, Carl-Daniel Hailfinger wrote:
> On 18.04.2008 18:32, Chris Kilgour wrote:
> > This trivial patch adds the SMSC SCH3112 superio chip ID to the
> > generic SMSC support, and corrects a small typo.
> > With this patch, coreboot v2 on a mainboard with SCH3112 has been
> > demonstrated to correctly use the serial port.  No other chip
> > functions were tested.
> >
> > Signed-off-by: Christopher Kilgour

Great stuff, thanks!

Committed in r3244 with the whitespace fixes mentioned.

Uwe.