Hi,
reading through v3 resource code caused a few questions: Why does ram_resource() live in device/pci_device.c? What does the index member of struct resource really mean? Sometimes it is a hardcoded number with no obvious meaning, sometimes it is a memory address, sometimes it is a resource type.
Also this snippet of northbridge/amd/geodelx/geodelx.c looks strange:
/**
- Set resources in the PCI domain.
- Also, as a side effect, create a RAM resource in the child which,
- interestingly enough, is the northbridge PCI device, for later
- allocation of address space.
- @param dev The device.
*/ static void geodelx_pci_domain_set_resources(struct device *dev) { int idx; struct device *mc_dev; struct northbridge_amd_geodelx_domain_config *nb_dm = (struct northbridge_amd_geodelx_domain_config *)dev->device_configuration;
printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__);
mc_dev = dev->link[0].children; if (mc_dev) { /* Report the memory regions. */ idx = 10;
Magical value?
/* 0 .. 640 KB */ ram_resource(dev, idx++, 0, 640); /* 1 MB .. (Systop - 1 MB) (in KB) */ ram_resource(dev, idx++, 1024, (get_systop(nb_dm) / 1024) - 1024);
}
phase4_assign_resources(&dev->link[0]); }
Regards, Carl-Daniel
On Wed, Mar 19, 2008 at 7:36 PM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
Hi,
reading through v3 resource code caused a few questions: Why does ram_resource() live in device/pci_device.c?
I think this really means "pci memory space" resource but I can't look jjust now.
What does the index member of struct resource really mean? Sometimes it is a hardcoded number with no obvious meaning, sometimes it is a memory address, sometimes it is a resource type.
it's a hack is my guess ... I just pulled that in from v2.
Also this snippet of northbridge/amd/geodelx/geodelx.c looks strange:
/**
- Set resources in the PCI domain.
- Also, as a side effect, create a RAM resource in the child which,
- interestingly enough, is the northbridge PCI device, for later
- allocation of address space.
- @param dev The device.
*/ static void geodelx_pci_domain_set_resources(struct device *dev) { int idx; struct device *mc_dev; struct northbridge_amd_geodelx_domain_config *nb_dm = (struct northbridge_amd_geodelx_domain_config *)dev->device_configuration;
printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); mc_dev = dev->link[0].children; if (mc_dev) { /* Report the memory regions. */ idx = 10;
Magical value?
yes.
/* 0 .. 640 KB */ ram_resource(dev, idx++, 0, 640); /* 1 MB .. (Systop - 1 MB) (in KB) */ ram_resource(dev, idx++, 1024, (get_systop(nb_dm) / 1024) - 1024); } phase4_assign_resources(&dev->link[0]);
}
we're going to need to figure this out but I just don't have time to look much right now.
Carl-daniel, if you want, put together a list of questions for denver; it's our job to create answers.
Thanks
ron