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On 09/17/2017 03:08 AM, Martin Roth wrote:
Hi Martin,
Hi Tirumalesh, The patch for the main code is here: https://review.coreboot.org/#/c/20861/ SOC code: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/denve
rton_ns
The only board that uses it right now is the CRB: https://review.coreboot.org/#/c/20862/ Mainboard code: https://review.coreboot.org/cgit/coreboot.git/tree/src/mainboard/intel
/harcuvar
I
can't see any information about FSP. Is there FSP binary used for this platform ?
Both with Tirumalesh we asked Intel, but they point to documentation that I have no access to. I would at least want to know what are the plans with Denverton support.
Best Regards, - -- Piotr Król Embedded Systems Consultant https://3mdeb.com | @3mdeb_com
-
Piotr Król