With the latest microcde update, there's one big problem: size. I haven't gotten to work yet on the model_f* cpus, but with the model_6xx cpus, we're way over the size barrier. So, I'd like to propose some changes to the organization, mostly for the better. The directory structure, in the end, would look something like this:
cpu/intel/: /intel_generic/: contains generic intel init code, used by all intel cpus. Also contains a generic driver, with no microcode updates and _all_ intel CPU IDs, for using an OS microcode update. /microcode/: contains all microcode files from the most recent update (20070907), along with current microcode update code. /slot_1_p2/: contains CPU IDs and microcode updates for Slot 1 P2s, P2-based Celerons, and mobile P2/P2-based Celerons /slot_1_p3/: Same as above, except for P3s, no mobiles /socket_370/: Same as above, for Socket 370 and mobile CPUs etc, etc.
Benefits: * We gain the latest microcode updates and support for every current Intel CPU, including Core/Core 2 (on an experimental, but it should work, basis). * Removal of a bunch of repeated code, no more model_xxx folders/confusion, just select a socket
Side Effects: * The end user needs to select between p2 and p3 cpus for slot 1 systems. This may also come up in LGA775-based systems, due to size constraints * The code looks somewhat ugly
I've attached intel_init.c, which is the generic intel CPU init, and slot_1_p2.c, which uses it, so you can see what I'm talking about. slot_1_p2.c was formerly just slot_1.c, so commented microcode updates and the appropriate CPU IDs will be removed. Feedback greatly appreciated!
Thanks, Corey
On Dec 30, 2007 3:50 PM, Corey Osgood corey.osgood@gmail.com wrote:
With the latest microcde update, there's one big problem: size.
what is the size?
- The end user needs to select between p2 and p3 cpus for slot 1
systems. This may also come up in LGA775-based systems, due to size constraints
for slot 1, we no longer care. But, in general, we must ensure that any cpu can be plugged into a socket that is allowed and still have microcode updates work. Can you explain the lga775 issue a bit more?
ron
ron minnich wrote:
On Dec 30, 2007 3:50 PM, Corey Osgood corey.osgood@gmail.com wrote:
With the latest microcde update, there's one big problem: size.
what is the size?
The full microcode update file is a little over 1MB, that's all the current updates for all CPUs, since the Pentium Pro. I've broken that down (with the help of a script) into individual updates, these range in size from 6-21K. Some CPU models have multiple updates, I'm not sure why, but my gut tells me they're all needed.
- The end user needs to select between p2 and p3 cpus for slot 1
systems. This may also come up in LGA775-based systems, due to size constraints
for slot 1, we no longer care. But, in general, we must ensure that any cpu can be plugged into a socket that is allowed and still have microcode updates work. Can you explain the lga775 issue a bit more?
ron
Not yet, because I'm not even sure there's going to be an issue, I'm still working on the 6xx series. I've had to go to intel.com and compose a list of all the PPro, P2, and P3 (and Xeon/Celerons of the same era) CPU IDs, and break them down by model and package, so it's a fairly long process. If there is a problem, it'll be the same as with the slot 1s, there will be so many updates for so many CPUs that all of them simply can't fit into a 4Mb rom.
-Corey
On Dec 31, 2007 8:36 AM, joe@smittys.pointclark.net wrote:
for slot 1, we no longer care.
Why do we not care about slot 1?? What are the 440BX boards going to do??
Thanks - Joe
Nobody's buying Slot 1 boards any more. 440BX is 7 years old. So if we have to inconvenience the entusiasts with the 7 year old chipsets to support the new stuff, so be it.
That said, the issue just went away slot_1 should be able to be merged back together. I just received an email back from intel, and only the latest microcode update is necessary. I'm done with everything up to and including socket 478, so I should get to lga775 tonight.
-Corey
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