Hi List,
i fixed a few boards which missed the proper Kconfig/sconfig conversion. Thanks to Peter Stuge for pointing that out. Also fix a few white space errors.
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for PCI and PCI domain devices.
Example:
device pci 00.0 on subsystemid dead beef end
If the user wants to have this ID inherited to all subdevices/functions, he can add 'inherit', like in the following example:
device pci 00.0 on subsystemid dead beef inherit end
If the user don't want to inherit a Subsystem for a single device, he can specify 'subsystemid 0 0' on this particular device.
Signed-off-by: Sven Schnelle svens@stackframe.org --- src/include/device/device.h | 2 + util/sconfig/main.c | 46 +++++++++++++ util/sconfig/sconfig.h | 4 + util/sconfig/sconfig.l | 2 + util/sconfig/sconfig.tab.c_shipped | 124 +++++++++++++++++++++--------------- util/sconfig/sconfig.tab.h_shipped | 4 +- util/sconfig/sconfig.y | 12 +++- 7 files changed, 139 insertions(+), 55 deletions(-)
diff --git a/src/include/device/device.h b/src/include/device/device.h index 7dbbb4f..f6bbe9a 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -64,6 +64,8 @@ struct device { struct device_path path; unsigned vendor; unsigned device; + unsigned subsystem_vendor; + unsigned subsystem_device; unsigned int class; /* 3 bytes: (base, sub, prog-if) */ unsigned int hdr_type; /* PCI header type */ unsigned int enabled : 1; /* set if we should enable the device */ diff --git a/util/sconfig/main.c b/util/sconfig/main.c index a3994fb..727fcce 100755 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -59,6 +59,8 @@ static struct device *new_dev(struct device *parent, struct device *bus) { dev->id = ++devcount; dev->parent = parent; dev->bus = bus; + dev->subsystem_vendor = -1; + dev->subsystem_device = -1; head->next = dev; head = dev; return dev; @@ -279,6 +281,18 @@ void add_register(struct device *dev, char *name, char *val) { } }
+void add_pci_subsystem_ids(struct device *dev, int vendor, int device, int inherit) +{ + if (dev->bustype != PCI && dev->bustype != PCI_DOMAIN) { + printf("ERROR: 'subsystem' only allowed for PCI devices\n"); + exit(1); + } + + dev->subsystem_vendor = vendor; + dev->subsystem_device = device; + dev->inherit_subsystem = inherit; +} + static void pass0(FILE *fil, struct device *ptr) { if (ptr->type == device && ptr->id == 0) fprintf(fil, "struct bus %s_links[];\n", ptr->name); @@ -303,6 +317,12 @@ static void pass1(FILE *fil, struct device *ptr) { fprintf(fil, "},\n"); fprintf(fil, "\t.enabled = %d,\n", ptr->enabled); fprintf(fil, "\t.on_mainboard = 1,\n"); + if (ptr->subsystem_vendor > 0) + fprintf(fil, "\t.subsystem_vendor = 0x%04x,\n", ptr->subsystem_vendor); + + if (ptr->subsystem_device > 0) + fprintf(fil, "\t.subsystem_device = 0x%04x,\n", ptr->subsystem_device); + if (ptr->rescnt > 0) { fprintf(fil, "\t.resource_list = &%s_res[0],\n", ptr->name); } @@ -392,6 +412,29 @@ static void walk_device_tree(FILE *fil, struct device *ptr, void (*func)(FILE *, } while (ptr); }
+static void inherit_subsystem_ids(FILE *file, struct device *dev) +{ + struct device *p; + int i =0; + + if (dev->subsystem_vendor != -1 && dev->subsystem_device != -1) { + /* user already gave us a subsystem vendor/device */ + return; + } + + for(p = dev; p && p != p->parent; (p = p->parent), i++) { + + if (p->bustype != PCI && p->bustype != PCI_DOMAIN) + continue; + + if (p->inherit_subsystem) { + dev->subsystem_vendor = p->subsystem_vendor; + dev->subsystem_device = p->subsystem_device; + break; + } + } +} + int main(int argc, char** argv) { if (argc != 3) { printf("usage: sconfig vendor/mainboard outputdir\n"); @@ -444,6 +487,9 @@ int main(int argc, char** argv) { h = h->next; fprintf(staticc, "#include "%s/chip.h"\n", h->name); } + + walk_device_tree(staticc, &root, inherit_subsystem_ids, NULL); + fprintf(staticc, "\n/* pass 0 */\n"); walk_device_tree(staticc, &root, pass0, NULL); fprintf(staticc, "\n/* pass 1 */\nstruct mainboard_config mainboard_info_0;\nstruct device *last_dev = &%s;\n", lastdev->name); diff --git a/util/sconfig/sconfig.h b/util/sconfig/sconfig.h index 8fbae6a..d893c05 100755 --- a/util/sconfig/sconfig.h +++ b/util/sconfig/sconfig.h @@ -52,6 +52,9 @@ struct device { int link; int rescnt; int chiph_exists; + int subsystem_vendor; + int subsystem_device; + int inherit_subsystem; char *ops; char *name; char *name_underscore; @@ -90,3 +93,4 @@ struct device *new_device(struct device *parent, struct device *busdev, const in void alias_siblings(struct device *d); void add_resource(struct device *dev, int type, int index, int base); void add_register(struct device *dev, char *name, char *val); +void add_pci_subsystem_ids(struct device *dev, int vendor, int device, int inherit); diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 3d1593a..50c315b 100755 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -42,6 +42,8 @@ pci_domain {yylval.number=PCI_DOMAIN; return(BUS);} irq {yylval.number=IRQ; return(RESOURCE);} drq {yylval.number=DRQ; return(RESOURCE);} io {yylval.number=IO; return(RESOURCE);} +inherit {return(INHERIT);} +subsystemid {return(SUBSYSTEMID);} end {return(END);} = {return(EQUALS);} 0x[0-9a-fA-F.]+ {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 4c78b62..dbefe06 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -139,7 +139,9 @@ static struct device *cur_parent, *cur_bus; IRQ = 274, DRQ = 275, IO = 276, - NUMBER = 277 + NUMBER = 277, + SUBSYSTEMID = 278, + INHERIT = 279 }; #endif
@@ -380,20 +382,20 @@ union yyalloc /* YYFINAL -- State number of the termination state. */ #define YYFINAL 3 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 24 +#define YYLAST 34
/* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 23 +#define YYNTOKENS 25 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 11 +#define YYNNTS 12 /* YYNRULES -- Number of rules. */ -#define YYNRULES 17 +#define YYNRULES 20 /* YYNRULES -- Number of states. */ -#define YYNSTATES 31 +#define YYNSTATES 36
/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 -#define YYMAXUTOK 277 +#define YYMAXUTOK 279
#define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) @@ -428,7 +430,7 @@ static const yytype_uint8 yytranslate[] = 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22 + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 };
#if YYDEBUG @@ -437,25 +439,28 @@ static const yytype_uint8 yytranslate[] = static const yytype_uint8 yyprhs[] = { 0, 0, 3, 4, 7, 10, 13, 16, 17, 20, - 23, 26, 27, 28, 34, 35, 43, 48 + 23, 26, 29, 30, 31, 37, 38, 46, 51, 56, + 60 };
/* YYRHS -- A `-1'-separated list of the rules' RHS. */ static const yytype_int8 yyrhs[] = { - 24, 0, -1, -1, 25, 28, -1, 26, 30, -1, - 26, 28, -1, 26, 33, -1, -1, 27, 30, -1, - 27, 28, -1, 27, 32, -1, -1, -1, 3, 12, - 29, 26, 9, -1, -1, 4, 7, 22, 6, 31, - 27, 9, -1, 8, 22, 10, 22, -1, 5, 12, - 10, 12, -1 + 26, 0, -1, -1, 27, 30, -1, 28, 32, -1, + 28, 30, -1, 28, 35, -1, -1, 29, 32, -1, + 29, 30, -1, 29, 34, -1, 29, 36, -1, -1, + -1, 3, 12, 31, 28, 9, -1, -1, 4, 7, + 22, 6, 33, 29, 9, -1, 8, 22, 10, 22, + -1, 5, 12, 10, 12, -1, 23, 22, 22, -1, + 23, 22, 22, 24, -1 };
/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ static const yytype_uint8 yyrline[] = { - 0, 34, 34, 34, 36, 36, 36, 36, 38, 38, - 38, 38, 40, 40, 50, 50, 62, 65 + 0, 35, 35, 35, 37, 37, 37, 37, 39, 39, + 39, 39, 39, 41, 41, 51, 51, 63, 66, 69, + 72 }; #endif
@@ -467,8 +472,9 @@ static const char *const yytname[] = "$end", "error", "$undefined", "CHIP", "DEVICE", "REGISTER", "BOOL", "BUS", "RESOURCE", "END", "EQUALS", "HEX", "STRING", "PCI", "PNP", "I2C", "APIC", "APIC_CLUSTER", "PCI_DOMAIN", "IRQ", "DRQ", "IO", "NUMBER", - "$accept", "devtree", "$@1", "chipchildren", "devicechildren", "chip", - "@2", "device", "@3", "resource", "registers", 0 + "SUBSYSTEMID", "INHERIT", "$accept", "devtree", "$@1", "chipchildren", + "devicechildren", "chip", "@2", "device", "@3", "resource", "registers", + "subsystemid", 0 }; #endif
@@ -479,22 +485,24 @@ static const yytype_uint16 yytoknum[] = { 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 275, 276, 277 + 275, 276, 277, 278, 279 }; # endif
/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_uint8 yyr1[] = { - 0, 23, 25, 24, 26, 26, 26, 26, 27, 27, - 27, 27, 29, 28, 31, 30, 32, 33 + 0, 25, 27, 26, 28, 28, 28, 28, 29, 29, + 29, 29, 29, 31, 30, 33, 32, 34, 35, 36, + 36 };
/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ static const yytype_uint8 yyr2[] = { 0, 2, 0, 2, 2, 2, 2, 0, 2, 2, - 2, 0, 0, 5, 0, 7, 4, 4 + 2, 2, 0, 0, 5, 0, 7, 4, 4, 3, + 4 };
/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state @@ -502,35 +510,35 @@ static const yytype_uint8 yyr2[] = means the default is an error. */ static const yytype_uint8 yydefact[] = { - 2, 0, 0, 1, 0, 3, 12, 7, 0, 0, - 0, 13, 5, 4, 6, 0, 0, 0, 0, 14, - 17, 11, 0, 0, 15, 9, 8, 10, 0, 0, - 16 + 2, 0, 0, 1, 0, 3, 13, 7, 0, 0, + 0, 14, 5, 4, 6, 0, 0, 0, 0, 15, + 18, 12, 0, 0, 16, 0, 9, 8, 10, 11, + 0, 0, 0, 19, 17, 20 };
/* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int8 yydefgoto[] = { - -1, 1, 2, 8, 22, 5, 7, 13, 21, 27, - 14 + -1, 1, 2, 8, 22, 5, 7, 13, 21, 28, + 14, 29 };
/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ -#define YYPACT_NINF -10 +#define YYPACT_NINF -9 static const yytype_int8 yypact[] = { - -10, 6, 5, -10, -1, -10, -10, -10, -2, 8, - 0, -10, -10, -10, -10, -9, 7, 10, 9, -10, - -10, -10, 1, -4, -10, -10, -10, -10, 12, -3, - -10 + -9, 3, 1, -9, -2, -9, -9, -9, 4, 5, + -1, -9, -9, -9, -9, -8, 7, 9, 6, -9, + -9, -9, -3, 0, -9, 2, -9, -9, -9, -9, + 11, 8, 10, -5, -9, -9 };
/* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -10, -10, -10, -10, -10, -8, -10, 2, -10, -10, - -10 + -9, -9, -9, -9, -9, -6, -9, 12, -9, -9, + -9, -9 };
/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If @@ -540,26 +548,28 @@ static const yytype_int8 yypgoto[] = #define YYTABLE_NINF -1 static const yytype_uint8 yytable[] = { - 12, 4, 9, 10, 4, 9, 3, 11, 4, 23, - 24, 6, 16, 17, 25, 15, 19, 18, 28, 30, - 0, 20, 29, 0, 26 + 4, 9, 12, 3, 4, 23, 24, 4, 9, 10, + 6, 16, 15, 11, 17, 19, 26, 18, 20, 35, + 25, 32, 30, 0, 31, 0, 0, 0, 0, 0, + 33, 0, 34, 0, 27 };
static const yytype_int8 yycheck[] = { - 8, 3, 4, 5, 3, 4, 0, 9, 3, 8, - 9, 12, 12, 22, 22, 7, 6, 10, 22, 22, - -1, 12, 10, -1, 22 + 3, 4, 8, 0, 3, 8, 9, 3, 4, 5, + 12, 12, 7, 9, 22, 6, 22, 10, 12, 24, + 23, 10, 22, -1, 22, -1, -1, -1, -1, -1, + 22, -1, 22, -1, 22 };
/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_uint8 yystos[] = { - 0, 24, 25, 0, 3, 28, 12, 29, 26, 4, - 5, 9, 28, 30, 33, 7, 12, 22, 10, 6, - 12, 31, 27, 8, 9, 28, 30, 32, 22, 10, - 22 + 0, 26, 27, 0, 3, 30, 12, 31, 28, 4, + 5, 9, 30, 32, 35, 7, 12, 22, 10, 6, + 12, 33, 29, 8, 9, 23, 30, 32, 34, 36, + 22, 22, 10, 22, 22, 24 };
#define yyerrok (yyerrstatus = 0) @@ -1380,7 +1390,7 @@ yyreduce: { postprocess_devtree(); ;} break;
- case 12: + case 13:
{ (yyval.device) = new_chip(cur_parent, cur_bus, (yyvsp[(2) - (2)].string)); @@ -1388,7 +1398,7 @@ yyreduce: ;} break;
- case 13: + case 14:
{ cur_parent = (yyvsp[(3) - (5)].device)->parent; @@ -1397,7 +1407,7 @@ yyreduce: ;} break;
- case 14: + case 15:
{ (yyval.device) = new_device(cur_parent, cur_bus, (yyvsp[(2) - (4)].number), (yyvsp[(3) - (4)].string), (yyvsp[(4) - (4)].number)); @@ -1406,7 +1416,7 @@ yyreduce: ;} break;
- case 15: + case 16:
{ cur_parent = (yyvsp[(5) - (7)].device)->parent; @@ -1416,16 +1426,26 @@ yyreduce: ;} break;
- case 16: + case 17:
{ add_resource(cur_parent, (yyvsp[(1) - (4)].number), strtol((yyvsp[(2) - (4)].string), NULL, 0), strtol((yyvsp[(4) - (4)].string), NULL, 0)); ;} break;
- case 17: + case 18:
{ add_register(cur_parent, (yyvsp[(2) - (4)].string), (yyvsp[(4) - (4)].string)); ;} break;
+ case 19: + + { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[(2) - (3)].string), NULL, 16), strtol((yyvsp[(3) - (3)].string), NULL, 16), 0); ;} + break; + + case 20: + + { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[(2) - (4)].string), NULL, 16), strtol((yyvsp[(3) - (4)].string), NULL, 16), 1); ;} + break; +
default: break; diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index 8c6b5f6..fc101c2 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -58,7 +58,9 @@ IRQ = 274, DRQ = 275, IO = 276, - NUMBER = 277 + NUMBER = 277, + SUBSYSTEMID = 278, + INHERIT = 279 }; #endif
diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 1c5db2a..f97850f 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -29,13 +29,14 @@ static struct device *cur_parent, *cur_bus; char *string; int number; } -%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER + +%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT %% devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ;
chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ;
-devicechildren: devicechildren device | devicechildren chip | devicechildren resource | /* empty */ ; +devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | /* empty */ ;
chip: CHIP STRING /* == path */ { $<device>$ = new_chip(cur_parent, cur_bus, $<string>2); @@ -65,4 +66,11 @@ resource: RESOURCE NUMBER /* == resnum */ EQUALS NUMBER /* == resval */ registers: REGISTER STRING /* == regname */ EQUALS STRING /* == regval */ { add_register(cur_parent, $<string>2, $<string>4); } ;
+subsystemid: SUBSYSTEMID NUMBER NUMBER + { add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 0); }; + +subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT + { add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 1); }; + + %%
Sven Schnelle wrote:
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for PCI and PCI domain devices.
Example:
device pci 00.0 on subsystemid dead beef end
If the user wants to have this ID inherited to all subdevices/functions, he can add 'inherit', like in the following example:
device pci 00.0 on subsystemid dead beef inherit end
If the user don't want to inherit a Subsystem for a single device, he can specify 'subsystemid 0 0' on this particular device.
Signed-off-by: Sven Schnelle svens@stackframe.org
Acked-by: Peter Stuge peter@stuge.se
Peter Stuge peter@stuge.se writes:
Sven Schnelle wrote:
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for PCI and PCI domain devices.
Example:
device pci 00.0 on subsystemid dead beef end
If the user wants to have this ID inherited to all subdevices/functions, he can add 'inherit', like in the following example:
device pci 00.0 on subsystemid dead beef inherit end
If the user don't want to inherit a Subsystem for a single device, he can specify 'subsystemid 0 0' on this particular device.
Signed-off-by: Sven Schnelle svens@stackframe.org
Acked-by: Peter Stuge peter@stuge.se
r6420, thanks.
~sven
--- src/Kconfig | 7 --- src/devices/pci_device.c | 21 ++------ src/mainboard/amd/bimini_fam10/Kconfig | 8 --- src/mainboard/amd/bimini_fam10/devicetree.cb | 1 + src/mainboard/amd/dbm690t/Kconfig | 8 --- src/mainboard/amd/dbm690t/devicetree.cb | 1 + src/mainboard/amd/inagua/Kconfig | 8 --- src/mainboard/amd/inagua/devicetree.cb | 1 + src/mainboard/amd/mahogany/Kconfig | 8 --- src/mainboard/amd/mahogany/devicetree.cb | 1 + src/mainboard/amd/mahogany_fam10/Kconfig | 8 --- src/mainboard/amd/mahogany_fam10/devicetree.cb | 1 + src/mainboard/amd/persimmon/Kconfig | 8 --- src/mainboard/amd/persimmon/devicetree.cb | 1 + src/mainboard/amd/pistachio/Kconfig | 8 --- src/mainboard/amd/pistachio/devicetree.cb | 1 + src/mainboard/amd/serengeti_cheetah/Kconfig | 8 --- src/mainboard/amd/serengeti_cheetah/devicetree.cb | 1 + src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | 8 --- .../amd/serengeti_cheetah_fam10/devicetree.cb | 1 + src/mainboard/amd/tilapia_fam10/Kconfig | 8 --- src/mainboard/amd/tilapia_fam10/devicetree.cb | 1 + src/mainboard/arima/hdama/Kconfig | 8 --- src/mainboard/arima/hdama/devicetree.cb | 1 + src/mainboard/asrock/939a785gmh/Kconfig | 8 --- src/mainboard/asrock/939a785gmh/devicetree.cb | 1 + src/mainboard/asrock/e350m1/Kconfig | 8 --- src/mainboard/asrock/e350m1/devicetree.cb | 1 + src/mainboard/asus/Kconfig | 4 -- src/mainboard/asus/a8n_e/Kconfig | 8 --- src/mainboard/asus/a8n_e/devicetree.cb | 1 + src/mainboard/asus/a8v-e_deluxe/Kconfig | 4 -- src/mainboard/asus/a8v-e_deluxe/devicetree.cb | 1 + src/mainboard/asus/a8v-e_se/Kconfig | 4 -- src/mainboard/asus/a8v-e_se/devicetree.cb | 1 + src/mainboard/asus/m2n-e/Kconfig | 4 -- src/mainboard/asus/m2n-e/devicetree.cb | 1 + src/mainboard/asus/m2v-mx_se/Kconfig | 4 -- src/mainboard/asus/m2v-mx_se/devicetree.cb | 1 + src/mainboard/asus/m2v/Kconfig | 4 -- src/mainboard/asus/m2v/devicetree.cb | 1 + src/mainboard/asus/m4a78-em/Kconfig | 8 --- src/mainboard/asus/m4a78-em/devicetree.cb | 1 + src/mainboard/asus/m4a785-m/Kconfig | 8 --- src/mainboard/asus/m4a785-m/devicetree.cb | 1 + src/mainboard/broadcom/blast/Kconfig | 8 --- src/mainboard/broadcom/blast/devicetree.cb | 1 + src/mainboard/dell/s1850/Kconfig | 8 --- src/mainboard/dell/s1850/devicetree.cb | 1 + src/mainboard/gigabyte/ga_2761gxdk/Kconfig | 8 --- src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb | 1 + src/mainboard/gigabyte/m57sli/Kconfig | 8 --- src/mainboard/gigabyte/m57sli/devicetree.cb | 1 + src/mainboard/gigabyte/ma785gmt/Kconfig | 8 --- src/mainboard/gigabyte/ma785gmt/devicetree.cb | 1 + src/mainboard/gigabyte/ma78gm/Kconfig | 8 --- src/mainboard/gigabyte/ma78gm/devicetree.cb | 1 + src/mainboard/hp/dl145_g1/Kconfig | 8 --- src/mainboard/hp/dl145_g1/devicetree.cb | 1 + src/mainboard/iei/kino-780am2-fam10/Kconfig | 8 --- src/mainboard/intel/Kconfig | 4 -- src/mainboard/intel/d945gclf/Kconfig | 4 -- src/mainboard/intel/d945gclf/devicetree.cb | 1 + src/mainboard/intel/jarrell/Kconfig | 8 --- src/mainboard/intel/jarrell/devicetree.cb | 1 + src/mainboard/intel/mtarvon/Kconfig | 8 --- src/mainboard/intel/mtarvon/devicetree.cb | 1 + src/mainboard/intel/truxton/Kconfig | 8 --- src/mainboard/intel/truxton/devicetree.cb | 1 + src/mainboard/intel/xe7501devkit/Kconfig | 8 --- src/mainboard/intel/xe7501devkit/devicetree.cb | 1 + src/mainboard/iwill/dk8_htx/Kconfig | 8 --- src/mainboard/iwill/dk8_htx/devicetree.cb | 1 + src/mainboard/iwill/dk8s2/Kconfig | 8 --- src/mainboard/iwill/dk8s2/devicetree.cb | 1 + src/mainboard/jetway/pa78vm5/Kconfig | 8 --- src/mainboard/jetway/pa78vm5/devicetree.cb | 1 + src/mainboard/kontron/kt690/Kconfig | 8 --- src/mainboard/kontron/kt690/devicetree.cb | 1 + src/mainboard/lenovo/x60/devicetree.cb | 50 +++++++++++++++----- src/mainboard/msi/Kconfig | 4 -- src/mainboard/msi/ms7135/Kconfig | 4 -- src/mainboard/msi/ms7135/devicetree.cb | 1 + src/mainboard/msi/ms7260/Kconfig | 8 --- src/mainboard/msi/ms7260/devicetree.cb | 1 + src/mainboard/msi/ms9185/Kconfig | 8 --- src/mainboard/msi/ms9185/devicetree.cb | 1 + src/mainboard/msi/ms9282/Kconfig | 8 --- src/mainboard/msi/ms9282/devicetree.cb | 1 + src/mainboard/msi/ms9652_fam10/Kconfig | 8 --- src/mainboard/msi/ms9652_fam10/devicetree.cb | 1 + src/mainboard/newisys/khepri/Kconfig | 8 --- src/mainboard/newisys/khepri/devicetree.cb | 1 + src/mainboard/nvidia/l1_2pvv/Kconfig | 8 --- src/mainboard/nvidia/l1_2pvv/devicetree.cb | 1 + src/mainboard/roda/Kconfig | 4 -- src/mainboard/roda/rk886ex/Kconfig | 4 -- src/mainboard/roda/rk886ex/devicetree.cb | 1 + src/mainboard/sunw/ultra40/Kconfig | 8 --- src/mainboard/sunw/ultra40/devicetree.cb | 1 + src/mainboard/supermicro/Kconfig | 4 -- src/mainboard/supermicro/h8dme/Kconfig | 8 --- src/mainboard/supermicro/h8dme/devicetree.cb | 1 + src/mainboard/supermicro/h8dmr/Kconfig | 8 --- src/mainboard/supermicro/h8dmr/devicetree.cb | 1 + src/mainboard/supermicro/h8dmr_fam10/Kconfig | 4 -- src/mainboard/supermicro/h8dmr_fam10/devicetree.cb | 1 + src/mainboard/supermicro/h8qme_fam10/Kconfig | 4 -- src/mainboard/supermicro/h8qme_fam10/devicetree.cb | 1 + src/mainboard/supermicro/x6dai_g/Kconfig | 8 --- src/mainboard/supermicro/x6dai_g/devicetree.cb | 1 + src/mainboard/supermicro/x6dhe_g/Kconfig | 8 --- src/mainboard/supermicro/x6dhe_g/devicetree.cb | 1 + src/mainboard/supermicro/x6dhe_g2/Kconfig | 8 --- src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 1 + src/mainboard/supermicro/x6dhr_ig/Kconfig | 8 --- src/mainboard/supermicro/x6dhr_ig/devicetree.cb | 1 + src/mainboard/supermicro/x6dhr_ig2/Kconfig | 8 --- src/mainboard/supermicro/x6dhr_ig2/devicetree.cb | 1 + src/mainboard/technexion/tim5690/Kconfig | 8 --- src/mainboard/technexion/tim5690/devicetree.cb | 1 + src/mainboard/technexion/tim8690/Kconfig | 8 --- src/mainboard/technexion/tim8690/devicetree.cb | 1 + src/mainboard/tyan/Kconfig | 4 -- src/mainboard/tyan/s2735/Kconfig | 4 -- src/mainboard/tyan/s2735/devicetree.cb | 1 + src/mainboard/tyan/s2850/Kconfig | 4 -- src/mainboard/tyan/s2850/devicetree.cb | 1 + src/mainboard/tyan/s2875/Kconfig | 4 -- src/mainboard/tyan/s2875/devicetree.cb | 1 + src/mainboard/tyan/s2880/Kconfig | 4 -- src/mainboard/tyan/s2880/devicetree.cb | 1 + src/mainboard/tyan/s2881/Kconfig | 4 -- src/mainboard/tyan/s2881/devicetree.cb | 1 + src/mainboard/tyan/s2882/Kconfig | 4 -- src/mainboard/tyan/s2882/devicetree.cb | 1 + src/mainboard/tyan/s2885/Kconfig | 4 -- src/mainboard/tyan/s2885/devicetree.cb | 1 + src/mainboard/tyan/s2891/Kconfig | 4 -- src/mainboard/tyan/s2891/devicetree.cb | 1 + src/mainboard/tyan/s2892/Kconfig | 4 -- src/mainboard/tyan/s2892/devicetree.cb | 1 + src/mainboard/tyan/s2895/Kconfig | 4 -- src/mainboard/tyan/s2895/devicetree.cb | 1 + src/mainboard/tyan/s2912/Kconfig | 4 -- src/mainboard/tyan/s2912/devicetree.cb | 1 + src/mainboard/tyan/s2912_fam10/Kconfig | 4 -- src/mainboard/tyan/s2912_fam10/devicetree.cb | 1 + src/mainboard/tyan/s4880/Kconfig | 4 -- src/mainboard/tyan/s4880/devicetree.cb | 1 + src/mainboard/tyan/s4882/Kconfig | 4 -- src/mainboard/tyan/s4882/devicetree.cb | 1 + src/mainboard/via/Kconfig | 4 -- src/mainboard/via/pc2500e/Kconfig | 8 --- src/mainboard/via/pc2500e/devicetree.cb | 1 + src/mainboard/wyse/Kconfig | 4 -- src/mainboard/wyse/s50/devicetree.cb | 1 + src/southbridge/intel/i82801gx/pci.c | 10 ++-- 158 files changed, 120 insertions(+), 561 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig index 28915b2..05b4adb 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -137,13 +137,6 @@ config PCI_BUS_SEGN_BITS int default 0
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x0 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x0 config PCI_ROM_RUN bool default n diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c index b6a8078..fe4c579 100644 --- a/src/devices/pci_device.c +++ b/src/devices/pci_device.c @@ -586,16 +586,6 @@ void pci_dev_set_resources(struct device *dev) pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); }
-unsigned __attribute__((weak)) mainboard_pci_subsystem_vendor_id(__attribute__((unused)) struct device *dev) -{ - return CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID; -} - -unsigned __attribute__((weak)) mainboard_pci_subsystem_device_id(__attribute__((unused)) struct device *dev) -{ - return CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID; -} - void pci_dev_enable_resources(struct device *dev) { const struct pci_operations *ops; @@ -604,12 +594,11 @@ void pci_dev_enable_resources(struct device *dev) /* Set the subsystem vendor and device ID for mainboard devices. */ ops = ops_pci(dev); if (dev->on_mainboard && ops && ops->set_subsystem) { - printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", dev_path(dev), - mainboard_pci_subsystem_vendor_id(dev), - mainboard_pci_subsystem_device_id(dev)); - ops->set_subsystem(dev, - mainboard_pci_subsystem_vendor_id(dev), - mainboard_pci_subsystem_device_id(dev)); + printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", + dev_path(dev), dev->subsystem_vendor, + dev->subsystem_device); + ops->set_subsystem(dev, dev->subsystem_vendor, + dev->subsystem_device); } command = pci_read_config16(dev, PCI_COMMAND); command |= dev->command; diff --git a/src/mainboard/amd/bimini_fam10/Kconfig b/src/mainboard/amd/bimini_fam10/Kconfig index d39da7b..2118078 100644 --- a/src/mainboard/amd/bimini_fam10/Kconfig +++ b/src/mainboard/amd/bimini_fam10/Kconfig @@ -91,14 +91,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/bimini_fam10/devicetree.cb b/src/mainboard/amd/bimini_fam10/devicetree.cb index 5916c9f..a5bec74 100644 --- a/src/mainboard/amd/bimini_fam10/devicetree.cb +++ b/src/mainboard/amd/bimini_fam10/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/amd/dbm690t/Kconfig b/src/mainboard/amd/dbm690t/Kconfig index d1e2649..3d3a04c 100644 --- a/src/mainboard/amd/dbm690t/Kconfig +++ b/src/mainboard/amd/dbm690t/Kconfig @@ -59,12 +59,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3050 - endif # BOARD_AMD_DBM690T diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index d13c5da..e1b01b2 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs690 diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig index 8a2c834..8e4eca9 100644 --- a/src/mainboard/amd/inagua/Kconfig +++ b/src/mainboard/amd/inagua/Kconfig @@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM int default 0
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1510 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index a0a19ea..acae2ca 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex diff --git a/src/mainboard/amd/mahogany/Kconfig b/src/mainboard/amd/mahogany/Kconfig index 09adfcb..731002d 100644 --- a/src/mainboard/amd/mahogany/Kconfig +++ b/src/mainboard/amd/mahogany/Kconfig @@ -73,12 +73,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - endif # BOARD_AMD_MAHOGANY diff --git a/src/mainboard/amd/mahogany/devicetree.cb b/src/mainboard/amd/mahogany/devicetree.cb index 7965989..d60d5a1 100644 --- a/src/mainboard/amd/mahogany/devicetree.cb +++ b/src/mainboard/amd/mahogany/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/amd/mahogany_fam10/Kconfig b/src/mainboard/amd/mahogany_fam10/Kconfig index 0f6c6b3..9c2e081 100644 --- a/src/mainboard/amd/mahogany_fam10/Kconfig +++ b/src/mainboard/amd/mahogany_fam10/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/mahogany_fam10/devicetree.cb b/src/mainboard/amd/mahogany_fam10/devicetree.cb index d1f26d1..c51e53e 100644 --- a/src/mainboard/amd/mahogany_fam10/devicetree.cb +++ b/src/mainboard/amd/mahogany_fam10/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/amd/persimmon/Kconfig b/src/mainboard/amd/persimmon/Kconfig index 650e7aa..66c37f2 100644 --- a/src/mainboard/amd/persimmon/Kconfig +++ b/src/mainboard/amd/persimmon/Kconfig @@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM int default 0
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1510 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index 48fd741..8ca165b 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex diff --git a/src/mainboard/amd/pistachio/Kconfig b/src/mainboard/amd/pistachio/Kconfig index b9f37b3..487a599 100644 --- a/src/mainboard/amd/pistachio/Kconfig +++ b/src/mainboard/amd/pistachio/Kconfig @@ -71,12 +71,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3050 - endif # BOARD_AMD_PISTACHIO diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index 76f0fe7..6608fdd 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge, K8 HT Configuration chip southbridge/amd/rs690 diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig index 6a4aea1..f08fd6e 100644 --- a/src/mainboard/amd/serengeti_cheetah/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah/Kconfig @@ -82,14 +82,6 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - config ACPI_SSDTX_NUM int default 4 diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index 8ea682f..b819292 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index a49e3c9..4c9d2a0 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -84,14 +84,6 @@ config ACPI_SSDTX_NUM int default 5
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb index 7c36509..bfbb2b3 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig index 0d85f86..b18115b 100644 --- a/src/mainboard/amd/tilapia_fam10/Kconfig +++ b/src/mainboard/amd/tilapia_fam10/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/amd/tilapia_fam10/devicetree.cb b/src/mainboard/amd/tilapia_fam10/devicetree.cb index 0a26361..aeb582a 100644 --- a/src/mainboard/amd/tilapia_fam10/devicetree.cb +++ b/src/mainboard/amd/tilapia_fam10/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/arima/hdama/Kconfig b/src/mainboard/arima/hdama/Kconfig index 0019bb4..7f0e40d 100644 --- a/src/mainboard/arima/hdama/Kconfig +++ b/src/mainboard/arima/hdama/Kconfig @@ -21,14 +21,6 @@ config MAINBOARD_DIR string default arima/hdama
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x161f - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3016 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index c908921..d7252e2 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x161f 0x3016 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/asrock/939a785gmh/Kconfig b/src/mainboard/asrock/939a785gmh/Kconfig index e3eb57a..7021655 100644 --- a/src/mainboard/asrock/939a785gmh/Kconfig +++ b/src/mainboard/asrock/939a785gmh/Kconfig @@ -74,12 +74,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - endif # BOARD_ASROCK_939A785GMH diff --git a/src/mainboard/asrock/939a785gmh/devicetree.cb b/src/mainboard/asrock/939a785gmh/devicetree.cb index 76f61b0..1dc92a3 100644 --- a/src/mainboard/asrock/939a785gmh/devicetree.cb +++ b/src/mainboard/asrock/939a785gmh/devicetree.cb @@ -16,6 +16,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index 06fd4f0..9b73ea3 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM int default 0
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1510 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index 648db98..9dceae6 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex diff --git a/src/mainboard/asus/Kconfig b/src/mainboard/asus/Kconfig index bf8742a..875fd5a 100644 --- a/src/mainboard/asus/Kconfig +++ b/src/mainboard/asus/Kconfig @@ -77,8 +77,4 @@ config MAINBOARD_VENDOR string default "ASUS"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - endif # VENDOR_ASUS diff --git a/src/mainboard/asus/a8n_e/Kconfig b/src/mainboard/asus/a8n_e/Kconfig index 6512589..aca9e33 100644 --- a/src/mainboard/asus/a8n_e/Kconfig +++ b/src/mainboard/asus/a8n_e/Kconfig @@ -70,12 +70,4 @@ config IRQ_SLOT_COUNT int default 13
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x815a - endif # BOARD_ASUS_A8N_E diff --git a/src/mainboard/asus/a8n_e/devicetree.cb b/src/mainboard/asus/a8n_e/devicetree.cb index 1144f0c..86bf3aa 100644 --- a/src/mainboard/asus/a8n_e/devicetree.cb +++ b/src/mainboard/asus/a8n_e/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end
device pci_domain 0 on # PCI domain + subsystemid 0x1043 0x815a inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig index f9ac563..05408ca 100644 --- a/src/mainboard/asus/a8v-e_deluxe/Kconfig +++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig @@ -70,8 +70,4 @@ config HT_CHAIN_UNITID_BASE hex default 0x0
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - endif # BOARD_ASUS_A8V_E_DELUXE diff --git a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb index cd80392..31df8fa 100644 --- a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb +++ b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge # Devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig index abf2bd9..4975cfa 100644 --- a/src/mainboard/asus/a8v-e_se/Kconfig +++ b/src/mainboard/asus/a8v-e_se/Kconfig @@ -70,8 +70,4 @@ config HT_CHAIN_UNITID_BASE hex default 0x0
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - endif # BOARD_ASUS_A8V_E_SE diff --git a/src/mainboard/asus/a8v-e_se/devicetree.cb b/src/mainboard/asus/a8v-e_se/devicetree.cb index cd80392..3da93fe 100644 --- a/src/mainboard/asus/a8v-e_se/devicetree.cb +++ b/src/mainboard/asus/a8v-e_se/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge # Devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/asus/m2n-e/Kconfig b/src/mainboard/asus/m2n-e/Kconfig index 60b7e15..c23a2df 100644 --- a/src/mainboard/asus/m2n-e/Kconfig +++ b/src/mainboard/asus/m2n-e/Kconfig @@ -98,8 +98,4 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x8239 - endif # BOARD_ASUS_M2N_E diff --git a/src/mainboard/asus/m2n-e/devicetree.cb b/src/mainboard/asus/m2n-e/devicetree.cb index dbadf0e..bf4de25 100644 --- a/src/mainboard/asus/m2n-e/devicetree.cb +++ b/src/mainboard/asus/m2n-e/devicetree.cb @@ -25,6 +25,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1043 0x8239 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig index b6a2fe6..09157ee 100644 --- a/src/mainboard/asus/m2v-mx_se/Kconfig +++ b/src/mainboard/asus/m2v-mx_se/Kconfig @@ -89,8 +89,4 @@ config HT_CHAIN_END_UNITID_BASE hex default 0x20
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - endif # BOARD_ASUS_M2V_MX_SE diff --git a/src/mainboard/asus/m2v-mx_se/devicetree.cb b/src/mainboard/asus/m2v-mx_se/devicetree.cb index 93a3a87..7e4c6d1 100644 --- a/src/mainboard/asus/m2v-mx_se/devicetree.cb +++ b/src/mainboard/asus/m2v-mx_se/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge # Devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig index 757bc32..571b940 100644 --- a/src/mainboard/asus/m2v/Kconfig +++ b/src/mainboard/asus/m2v/Kconfig @@ -75,10 +75,6 @@ config HT_CHAIN_UNITID_BASE hex default 0x0
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config IRQ_SLOT_COUNT int default 14 diff --git a/src/mainboard/asus/m2v/devicetree.cb b/src/mainboard/asus/m2v/devicetree.cb index a08defb..2ace9db 100644 --- a/src/mainboard/asus/m2v/devicetree.cb +++ b/src/mainboard/asus/m2v/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x143 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge # Devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/asus/m4a78-em/Kconfig b/src/mainboard/asus/m4a78-em/Kconfig index 18542d3..d036b21 100644 --- a/src/mainboard/asus/m4a78-em/Kconfig +++ b/src/mainboard/asus/m4a78-em/Kconfig @@ -77,14 +77,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x83f1 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/asus/m4a78-em/devicetree.cb b/src/mainboard/asus/m4a78-em/devicetree.cb index 914fde4..c463d71 100644 --- a/src/mainboard/asus/m4a78-em/devicetree.cb +++ b/src/mainboard/asus/m4a78-em/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1043 0x83f1 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/asus/m4a785-m/Kconfig b/src/mainboard/asus/m4a785-m/Kconfig index e41fcc2..84cc06c 100644 --- a/src/mainboard/asus/m4a785-m/Kconfig +++ b/src/mainboard/asus/m4a785-m/Kconfig @@ -78,14 +78,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x83a2 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/asus/m4a785-m/devicetree.cb b/src/mainboard/asus/m4a785-m/devicetree.cb index 0736b72..e8764b1 100644 --- a/src/mainboard/asus/m4a785-m/devicetree.cb +++ b/src/mainboard/asus/m4a785-m/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1043 0x83a2 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/broadcom/blast/Kconfig b/src/mainboard/broadcom/blast/Kconfig index 63a2975..4bad57d 100644 --- a/src/mainboard/broadcom/blast/Kconfig +++ b/src/mainboard/broadcom/blast/Kconfig @@ -70,12 +70,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x161f - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3050 - endif # BOARD_BROADCOM_BLAST diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index c50ebc7..6779a7a 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x161f 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0 diff --git a/src/mainboard/dell/s1850/Kconfig b/src/mainboard/dell/s1850/Kconfig index 4185dfc..381c9f6 100644 --- a/src/mainboard/dell/s1850/Kconfig +++ b/src/mainboard/dell/s1850/Kconfig @@ -26,14 +26,6 @@ config MAINBOARD_PART_NUMBER string default "PowerEdge 1850"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x5580 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - config MAX_CPUS int default 4 diff --git a/src/mainboard/dell/s1850/devicetree.cb b/src/mainboard/dell/s1850/devicetree.cb index de8c90b..c56fd37 100644 --- a/src/mainboard/dell/s1850/devicetree.cb +++ b/src/mainboard/dell/s1850/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7520 # mch device pci_domain 0 on + subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports device pci 1d.0 on end diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig index 6571b31..d25db85 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig +++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig @@ -78,14 +78,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1039 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1234 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb index 62f9238..e1aac4e 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb +++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1039 0x1234 inherit chip northbridge/amd/amdk8 #mc0 device pci 18.0 on # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig index e36dccc..7250a9c 100644 --- a/src/mainboard/gigabyte/m57sli/Kconfig +++ b/src/mainboard/gigabyte/m57sli/Kconfig @@ -82,14 +82,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/gigabyte/m57sli/devicetree.cb b/src/mainboard/gigabyte/m57sli/devicetree.cb index 3bae560..2184de5 100644 --- a/src/mainboard/gigabyte/m57sli/devicetree.cb +++ b/src/mainboard/gigabyte/m57sli/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig index 96b456c..fd511a8 100644 --- a/src/mainboard/gigabyte/ma785gmt/Kconfig +++ b/src/mainboard/gigabyte/ma785gmt/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/gigabyte/ma785gmt/devicetree.cb b/src/mainboard/gigabyte/ma785gmt/devicetree.cb index dc7bd10..6cc966a 100644 --- a/src/mainboard/gigabyte/ma785gmt/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gmt/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/gigabyte/ma78gm/Kconfig b/src/mainboard/gigabyte/ma78gm/Kconfig index cf3f6a2..56b819e 100644 --- a/src/mainboard/gigabyte/ma78gm/Kconfig +++ b/src/mainboard/gigabyte/ma78gm/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/gigabyte/ma78gm/devicetree.cb b/src/mainboard/gigabyte/ma78gm/devicetree.cb index 59e1502..38ff642 100644 --- a/src/mainboard/gigabyte/ma78gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma78gm/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x3060 0x1022 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/hp/dl145_g1/Kconfig b/src/mainboard/hp/dl145_g1/Kconfig index bb4a33d..eb90b07 100644 --- a/src/mainboard/hp/dl145_g1/Kconfig +++ b/src/mainboard/hp/dl145_g1/Kconfig @@ -34,14 +34,6 @@ config MAINBOARD_PART_NUMBER string default "ProLiant DL145 G1"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x7460 - config MAX_CPUS int default 4 diff --git a/src/mainboard/hp/dl145_g1/devicetree.cb b/src/mainboard/hp/dl145_g1/devicetree.cb index bd37862..3237723 100644 --- a/src/mainboard/hp/dl145_g1/devicetree.cb +++ b/src/mainboard/hp/dl145_g1/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x7460 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 device pci 18.0 on end # link 1 diff --git a/src/mainboard/iei/kino-780am2-fam10/Kconfig b/src/mainboard/iei/kino-780am2-fam10/Kconfig index e662fe4..8fb1950 100644 --- a/src/mainboard/iei/kino-780am2-fam10/Kconfig +++ b/src/mainboard/iei/kino-780am2-fam10/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x0000 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x0000 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/intel/Kconfig b/src/mainboard/intel/Kconfig index 612b1c1..ff8d63b 100644 --- a/src/mainboard/intel/Kconfig +++ b/src/mainboard/intel/Kconfig @@ -32,8 +32,4 @@ config MAINBOARD_VENDOR string default "Intel"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - endif # VENDOR_INTEL diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index 04643bb..ff8c638 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -49,10 +49,6 @@ config MAINBOARD_PART_NUMBER string default "D945GCLF"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x464C - config MMCONF_BASE_ADDRESS hex default 0xf0000000 diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index c808cdc..a58d99e 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -26,6 +26,7 @@ chip northbridge/intel/i945 end
device pci_domain 0 on + subsystemid 0x8086 0x464c inherit device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/intel/jarrell/Kconfig b/src/mainboard/intel/jarrell/Kconfig index 2ac8ea3..494086e 100644 --- a/src/mainboard/intel/jarrell/Kconfig +++ b/src/mainboard/intel/jarrell/Kconfig @@ -35,14 +35,6 @@ config IRQ_SLOT_COUNT int default 18
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1079 - config DIMM_MAP_LOGICAL hex default 0x0124 diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb index a187d23..fb32a08 100644 --- a/src/mainboard/intel/jarrell/devicetree.cb +++ b/src/mainboard/intel/jarrell/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7520 device pci_domain 0 on + subsystemid 0x8086 0x1079 inherit device pci 00.0 on end device pci 00.1 on end device pci 01.0 on end diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig index 76dec5e..76477b0 100644 --- a/src/mainboard/intel/mtarvon/Kconfig +++ b/src/mainboard/intel/mtarvon/Kconfig @@ -25,14 +25,6 @@ config IRQ_SLOT_COUNT int default 1
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2680 - config DCACHE_RAM_BASE hex default 0xffdf8000 diff --git a/src/mainboard/intel/mtarvon/devicetree.cb b/src/mainboard/intel/mtarvon/devicetree.cb index 8585b54..cd7df2d 100644 --- a/src/mainboard/intel/mtarvon/devicetree.cb +++ b/src/mainboard/intel/mtarvon/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/i3100 device pci_domain 0 on + subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status device pci 01.0 on end # IMCH EDMA engine diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig index 1ba7137..5f7de08 100644 --- a/src/mainboard/intel/truxton/Kconfig +++ b/src/mainboard/intel/truxton/Kconfig @@ -27,14 +27,6 @@ config IRQ_SLOT_COUNT int default 1
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2680 - config MAX_CPUS int default 4 diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb index 7563f02..ced9eb9 100644 --- a/src/mainboard/intel/truxton/devicetree.cb +++ b/src/mainboard/intel/truxton/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/i3100 device pci_domain 0 on + subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status device pci 01.0 on end # IMCH EDMA engine diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig index 35a1cd1..9163423 100644 --- a/src/mainboard/intel/xe7501devkit/Kconfig +++ b/src/mainboard/intel/xe7501devkit/Kconfig @@ -37,12 +37,4 @@ config MAX_PHYSICAL_CPUS int default 2
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2480 - endif # BOARD_INTEL_XE7501DEVKIT diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb index 3275457..e8b9e82 100644 --- a/src/mainboard/intel/xe7501devkit/devicetree.cb +++ b/src/mainboard/intel/xe7501devkit/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7501 device pci_domain 0 on + subsystemid 0x8086 0x2480 inheritx device pci 0.0 on end # Chipset host controller device pci 0.1 on end # Host RASUM controller device pci 2.0 on # Hub interface B diff --git a/src/mainboard/iwill/dk8_htx/Kconfig b/src/mainboard/iwill/dk8_htx/Kconfig index 414fa45..e58fe4e 100644 --- a/src/mainboard/iwill/dk8_htx/Kconfig +++ b/src/mainboard/iwill/dk8_htx/Kconfig @@ -63,14 +63,6 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - config ACPI_SSDTX_NUM int default 5 diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb index e1cb939..d0cff02 100644 --- a/src/mainboard/iwill/dk8_htx/devicetree.cb +++ b/src/mainboard/iwill/dk8_htx/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig index d144b7d..78d0637 100644 --- a/src/mainboard/iwill/dk8s2/Kconfig +++ b/src/mainboard/iwill/dk8s2/Kconfig @@ -60,12 +60,4 @@ config IRQ_SLOT_COUNT int default 12
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x161f - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3016 - endif # BOARD_IWILL_DK8S2 diff --git a/src/mainboard/iwill/dk8s2/devicetree.cb b/src/mainboard/iwill/dk8s2/devicetree.cb index 8185b5d..5f27f87 100644 --- a/src/mainboard/iwill/dk8s2/devicetree.cb +++ b/src/mainboard/iwill/dk8s2/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x161f 0x3016 inheritx chip northbridge/amd/amdk8 device pci 18.0 on # LDT 0 chip southbridge/amd/amd8131 diff --git a/src/mainboard/jetway/pa78vm5/Kconfig b/src/mainboard/jetway/pa78vm5/Kconfig index 10fab73..62adb53 100644 --- a/src/mainboard/jetway/pa78vm5/Kconfig +++ b/src/mainboard/jetway/pa78vm5/Kconfig @@ -79,14 +79,6 @@ config HEAP_SIZE hex default 0xc0000
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/jetway/pa78vm5/devicetree.cb b/src/mainboard/jetway/pa78vm5/devicetree.cb index 73f6ac2..5ce3a6d 100644 --- a/src/mainboard/jetway/pa78vm5/devicetree.cb +++ b/src/mainboard/jetway/pa78vm5/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 diff --git a/src/mainboard/kontron/kt690/Kconfig b/src/mainboard/kontron/kt690/Kconfig index 891de59..91d6b67 100644 --- a/src/mainboard/kontron/kt690/Kconfig +++ b/src/mainboard/kontron/kt690/Kconfig @@ -28,14 +28,6 @@ config MAINBOARD_DIR string default kontron/kt690
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1488 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x6900 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb index d509050..e589641 100644 --- a/src/mainboard/kontron/kt690/devicetree.cb +++ b/src/mainboard/kontron/kt690/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1488 0x6900 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs690 diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 40e16b3..f766e89 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -29,9 +29,16 @@ chip northbridge/intel/i945 end
device pci_domain 0 on - device pci 00.0 on end # host bridge - device pci 02.0 on end # vga controller - device pci 02.1 on end # display controller + subsystemid 1337 0 inherit + device pci 00.0 on # Host bridge + subsystemid 0x17aa 0x2017 + end + device pci 02.0 on # VGA controller + subsystemid 0x17aa 0x201a + end + device pci 02.1 on # display controller + subsystemid 0x17aa 0x201a + end chip southbridge/intel/i82801gx register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b" @@ -54,15 +61,28 @@ chip northbridge/intel/i945
register "gpe0_en" = "0x11000006"
- device pci 1b.0 on end # Audio Controller + device pci 1b.0 on # Audio Cnotroller + subsystemid 0x17aa 0x2010 + end device pci 1c.0 on end # Ethernet device pci 1c.1 on end # Atheros WLAN - device pci 1d.0 on end # USB UHCI - device pci 1d.1 on end # USB UHCI - device pci 1d.2 on end # USB UHCI - device pci 1d.3 on end # USB UHCI - device pci 1d.7 on end # USB2 EHCI + device pci 1d.0 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.1 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.2 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.3 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.7 on # USB2 EHCI + subsystemid 0x17aa 0x200b + end device pci 1f.0 on # PCI-LPC bridge + subsystemid 0x17aa 0x2009 chip ec/lenovo/pmh7 device pnp ff.1 on # dummy end @@ -120,9 +140,15 @@ chip northbridge/intel/i945 end end end - device pci 1f.1 off end # IDE - device pci 1f.2 on end # SATA - device pci 1f.3 on end # SMBus + device pci 1f.1 off # IDE + subsystemid 0x17aa 0x200c + end + device pci 1f.2 on # SATA + subsystemid 0x17aa 0x200d + end + device pci 1f.3 on # SMBUS + subsystemid 0x17aa 0x200f + end end chip southbridge/ricoh/rl5c476 end diff --git a/src/mainboard/msi/Kconfig b/src/mainboard/msi/Kconfig index c2f1595..3d0de4a 100644 --- a/src/mainboard/msi/Kconfig +++ b/src/mainboard/msi/Kconfig @@ -56,8 +56,4 @@ config MAINBOARD_VENDOR string default "MSI"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1462 - endif # VENDOR_MSI diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig index d8581f7..0611be2 100644 --- a/src/mainboard/msi/ms7135/Kconfig +++ b/src/mainboard/msi/ms7135/Kconfig @@ -34,10 +34,6 @@ config MAINBOARD_PART_NUMBER string default "MS-7135"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x7135 - config MAX_CPUS int default 2 diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb index 14c6bad..54e5d5e 100644 --- a/src/mainboard/msi/ms7135/devicetree.cb +++ b/src/mainboard/msi/ms7135/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end
device pci_domain 0 on # PCI domain + subsystemid 0x1462 0x7135 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index aec6af5..be425ec 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -80,14 +80,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1462 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x7260 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/msi/ms7260/devicetree.cb b/src/mainboard/msi/ms7260/devicetree.cb index 552224d..47d5381 100644 --- a/src/mainboard/msi/ms7260/devicetree.cb +++ b/src/mainboard/msi/ms7260/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1462 0x7260 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig index 5e28353..1464acd 100644 --- a/src/mainboard/msi/ms9185/Kconfig +++ b/src/mainboard/msi/ms9185/Kconfig @@ -71,12 +71,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - endif # BOARD_MSI_MS9185 diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index fc566e2..4051c10 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/msi/ms9282/Kconfig b/src/mainboard/msi/ms9282/Kconfig index f2ea65a..3ccc3f9 100644 --- a/src/mainboard/msi/ms9282/Kconfig +++ b/src/mainboard/msi/ms9282/Kconfig @@ -72,14 +72,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1462 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x9282 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index 74ea183..b52e7ed 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1462 0x9282 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig index d8025d7..948d320 100644 --- a/src/mainboard/msi/ms9652_fam10/Kconfig +++ b/src/mainboard/msi/ms9652_fam10/Kconfig @@ -87,14 +87,6 @@ config MAINBOARD_PART_NUMBER string default "MS-9652"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1462 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x9652 - config RAMBASE hex default 0x200000 diff --git a/src/mainboard/msi/ms9652_fam10/devicetree.cb b/src/mainboard/msi/ms9652_fam10/devicetree.cb index c3e4e4f..0e9a3ff 100644 --- a/src/mainboard/msi/ms9652_fam10/devicetree.cb +++ b/src/mainboard/msi/ms9652_fam10/devicetree.cb @@ -28,6 +28,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1462 0x9652 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on # Link 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig index d11d6ea..fc4c223 100644 --- a/src/mainboard/newisys/khepri/Kconfig +++ b/src/mainboard/newisys/khepri/Kconfig @@ -69,12 +69,4 @@ config IRQ_SLOT_COUNT int default 9
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17c2 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x10 - endif # BOARD_NEWISYS_KHEPRI diff --git a/src/mainboard/newisys/khepri/devicetree.cb b/src/mainboard/newisys/khepri/devicetree.cb index a56a010..97d506a 100644 --- a/src/mainboard/newisys/khepri/devicetree.cb +++ b/src/mainboard/newisys/khepri/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex end
device pci_domain 0 on + subsystemid 0x17c2 0x0010 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 device pci 18.0 on # LDT 1 diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig index 80f5e34..bfec323 100644 --- a/src/mainboard/nvidia/l1_2pvv/Kconfig +++ b/src/mainboard/nvidia/l1_2pvv/Kconfig @@ -84,14 +84,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/nvidia/l1_2pvv/devicetree.cb b/src/mainboard/nvidia/l1_2pvv/devicetree.cb index 1340cb3..9a80710 100644 --- a/src/mainboard/nvidia/l1_2pvv/devicetree.cb +++ b/src/mainboard/nvidia/l1_2pvv/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge diff --git a/src/mainboard/roda/Kconfig b/src/mainboard/roda/Kconfig index d2f1e95..ba4b6ec 100644 --- a/src/mainboard/roda/Kconfig +++ b/src/mainboard/roda/Kconfig @@ -14,8 +14,4 @@ config MAINBOARD_VENDOR string default "Roda"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x4352 - endif # VENDOR_RODA diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig index 647511a..340ee98 100644 --- a/src/mainboard/roda/rk886ex/Kconfig +++ b/src/mainboard/roda/rk886ex/Kconfig @@ -46,10 +46,6 @@ config MAX_PHYSICAL_CPUS int default 2
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x6886 - config MAXIMUM_SUPPORTED_FREQUENCY int default 400 diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index a713331..7439462 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -28,6 +28,7 @@ chip northbridge/intel/i945 end
device pci_domain 0 on + subsystemid 0x4352 0x0686 inherit device pci 00.0 on end # host bridge # auto detection: #device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig index 3b8544b..81a6608 100644 --- a/src/mainboard/sunw/ultra40/Kconfig +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -75,12 +75,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x108e - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x40 - endif # BOARD_SUNW_ULTRA40 diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb index 059724e..829a7d4 100644 --- a/src/mainboard/sunw/ultra40/devicetree.cb +++ b/src/mainboard/sunw/ultra40/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x108e 0x40 inheritx chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig index 5ac7dda..8e5694c 100644 --- a/src/mainboard/supermicro/Kconfig +++ b/src/mainboard/supermicro/Kconfig @@ -38,8 +38,4 @@ config MAINBOARD_VENDOR string default "Supermicro"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - endif # VENDOR_SUPERMICRO diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index 0259b4a..ce49a47 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -81,12 +81,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1511 - endif # BOARD_SUPERMICRO_H8DME diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb index df40dc3..73a43e8 100644 --- a/src/mainboard/supermicro/h8dme/devicetree.cb +++ b/src/mainboard/supermicro/h8dme/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index 81517be..5527319 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -80,12 +80,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1511 - endif # BOARD_SUPERMICRO_H8DMR diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb index 1dfd32a..6c96ac0 100644 --- a/src/mainboard/supermicro/h8dmr/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig index 4b31bf3..195bc5c 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig +++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig @@ -100,8 +100,4 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1511 - endif # BOARD_SUPERMICRO_H8DMR_FAM10 diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb index da82b17..6c4443f 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index bd0f550..1d4f8e7 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -99,10 +99,6 @@ config SERIAL_CPU_INIT bool default y
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1511 - config STACK_SIZE hex default 0x10000 diff --git a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb index 990afa4..56ba7b5 100644 --- a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig index 8b1cf5a..bac1008 100644 --- a/src/mainboard/supermicro/x6dai_g/Kconfig +++ b/src/mainboard/supermicro/x6dai_g/Kconfig @@ -23,14 +23,6 @@ config MAINBOARD_PART_NUMBER string default "X6DAi-G"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x6780 - config MAX_CPUS int default 4 diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb index c8ce779..e6201a8 100644 --- a/src/mainboard/supermicro/x6dai_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dai_g/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7525 # mch device pci_domain 0 on + subsystemid 0x15d9 0x6780 inherit chip southbridge/intel/esb6300 # esb6300 register "pirq_a_d" = "0x0b0a0a05" register "pirq_e_h" = "0x0a0b0c80" diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig index 8771d9e..e8466be 100644 --- a/src/mainboard/supermicro/x6dhe_g/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g/Kconfig @@ -25,14 +25,6 @@ config MAINBOARD_PART_NUMBER string default "X6DHE-G"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x6080 - config MAX_CPUS int default 4 diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb index 6dd6b17..08c0751 100644 --- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.3 off end end device pci_domain 0 on + subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/esb6300 # ESB6300 register "pirq_a_d" = "0x0b070a05" register "pirq_e_h" = "0x0a808080" diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig index 96549d6..e9d4041 100644 --- a/src/mainboard/supermicro/x6dhe_g2/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig @@ -26,14 +26,6 @@ config MAINBOARD_PART_NUMBER string default "X6DHE-G2"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x6080 - config MAX_CPUS int default 4 diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb index 04110b0..ecfe0a0 100644 --- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.3 off end end device pci_domain 0 on + subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/i82801ex # ICH5R register "pirq_a_d" = "0x0b070a05" register "pirq_e_h" = "0x0a808080" diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig index d1163d7..a146e77 100644 --- a/src/mainboard/supermicro/x6dhr_ig/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig @@ -25,14 +25,6 @@ config MAINBOARD_PART_NUMBER string default "X6DHR-iG"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x5580 - config MAX_CPUS int default 4 diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb index df778ed..6ada3b1 100644 --- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7520 # mch device pci_domain 0 on + subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports device pci 1d.0 on end diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig index 494b0ed..6196e2a 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig2/Kconfig @@ -25,14 +25,6 @@ config MAINBOARD_PART_NUMBER string default "X6DHR-iG2"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x5580 - config MAX_CPUS int default 4 diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb index 77c9e9d..3d9b644 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7520 # mch device pci_domain 0 on + subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports device pci 1d.0 on end diff --git a/src/mainboard/technexion/tim5690/Kconfig b/src/mainboard/technexion/tim5690/Kconfig index d855df1..21cfa7b 100644 --- a/src/mainboard/technexion/tim5690/Kconfig +++ b/src/mainboard/technexion/tim5690/Kconfig @@ -60,14 +60,6 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3050 - config STACK_SIZE hex default 0x2000 diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb index c129a2d..970d0e2 100644 --- a/src/mainboard/technexion/tim5690/devicetree.cb +++ b/src/mainboard/technexion/tim5690/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs690 diff --git a/src/mainboard/technexion/tim8690/Kconfig b/src/mainboard/technexion/tim8690/Kconfig index b9f34ad..5af6ace 100644 --- a/src/mainboard/technexion/tim8690/Kconfig +++ b/src/mainboard/technexion/tim8690/Kconfig @@ -59,12 +59,4 @@ config IRQ_SLOT_COUNT int default 11
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3050 - endif # BOARD_TECHNEXION_TIM8690 diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb index 55a2e05..6981dbc 100644 --- a/src/mainboard/technexion/tim8690/devicetree.cb +++ b/src/mainboard/technexion/tim8690/devicetree.cb @@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge chip southbridge/amd/rs690 diff --git a/src/mainboard/tyan/Kconfig b/src/mainboard/tyan/Kconfig index 6af48a2..01e4f35 100644 --- a/src/mainboard/tyan/Kconfig +++ b/src/mainboard/tyan/Kconfig @@ -74,8 +74,4 @@ config MAINBOARD_VENDOR string default "Tyan"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x10f1 - endif # VENDOR_TYAN diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig index e1f475b..4aafa3c 100644 --- a/src/mainboard/tyan/s2735/Kconfig +++ b/src/mainboard/tyan/s2735/Kconfig @@ -45,8 +45,4 @@ config MAX_PHYSICAL_CPUS int default 2
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2735 - endif # BOARD_TYAN_S2735 diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index b519a4a..542a013 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7501 device pci_domain 0 on + subsystemid 0x10f1 0x2735 inherit device pci 0.0 on end device pci 0.1 on end device pci 2.0 on diff --git a/src/mainboard/tyan/s2850/Kconfig b/src/mainboard/tyan/s2850/Kconfig index ab5897a..c555951 100644 --- a/src/mainboard/tyan/s2850/Kconfig +++ b/src/mainboard/tyan/s2850/Kconfig @@ -23,10 +23,6 @@ config MAINBOARD_PART_NUMBER string default "S2850"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2850 - config MAX_CPUS int default 2 diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 6a9a420..0ec3d6e 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2850 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 # devices on link 2, link 2 == LDT 2 diff --git a/src/mainboard/tyan/s2875/Kconfig b/src/mainboard/tyan/s2875/Kconfig index 89a1177..56c3723 100644 --- a/src/mainboard/tyan/s2875/Kconfig +++ b/src/mainboard/tyan/s2875/Kconfig @@ -25,10 +25,6 @@ config MAINBOARD_PART_NUMBER string default "S2875"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2875 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index d3c2582..c9f0dd2 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2875 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig index a98ec06..87ec6ca 100644 --- a/src/mainboard/tyan/s2880/Kconfig +++ b/src/mainboard/tyan/s2880/Kconfig @@ -33,10 +33,6 @@ config MAINBOARD_PART_NUMBER string default "S2880"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2880 - config MAX_CPUS int default 2 diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index ba43b27..735b4e6 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2880 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2881/Kconfig b/src/mainboard/tyan/s2881/Kconfig index 81a349d..fd5fca8 100644 --- a/src/mainboard/tyan/s2881/Kconfig +++ b/src/mainboard/tyan/s2881/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2881"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2881 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index 2422459..7e836ff 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2881 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 device pci 18.0 on end # link 1 diff --git a/src/mainboard/tyan/s2882/Kconfig b/src/mainboard/tyan/s2882/Kconfig index 00e813a..c6711b3 100644 --- a/src/mainboard/tyan/s2882/Kconfig +++ b/src/mainboard/tyan/s2882/Kconfig @@ -34,10 +34,6 @@ config MAINBOARD_PART_NUMBER string default "S2882"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2882 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index b8f2160..bbc4a59 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex end
device pci_domain 0 on + subsystemid 0x10f1 0x2882 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2885/Kconfig b/src/mainboard/tyan/s2885/Kconfig index 03a5952..f4a6f49 100644 --- a/src/mainboard/tyan/s2885/Kconfig +++ b/src/mainboard/tyan/s2885/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2885"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2885 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index 0eb1b9e..7e45a8c 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2885 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 chip southbridge/amd/amd8151 diff --git a/src/mainboard/tyan/s2891/Kconfig b/src/mainboard/tyan/s2891/Kconfig index 31e99b6..2848380 100644 --- a/src/mainboard/tyan/s2891/Kconfig +++ b/src/mainboard/tyan/s2891/Kconfig @@ -36,10 +36,6 @@ config MAINBOARD_PART_NUMBER string default "S2891"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2891 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb index 73034b1..d793640 100644 --- a/src/mainboard/tyan/s2891/devicetree.cb +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2891 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2892/Kconfig b/src/mainboard/tyan/s2892/Kconfig index df3430b..88703f3 100644 --- a/src/mainboard/tyan/s2892/Kconfig +++ b/src/mainboard/tyan/s2892/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2892"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2892 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb index b84c041..3b999ca 100644 --- a/src/mainboard/tyan/s2892/devicetree.cb +++ b/src/mainboard/tyan/s2892/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2892 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2895/Kconfig b/src/mainboard/tyan/s2895/Kconfig index 0f8482b..f35ea82 100644 --- a/src/mainboard/tyan/s2895/Kconfig +++ b/src/mainboard/tyan/s2895/Kconfig @@ -40,10 +40,6 @@ config MAINBOARD_PART_NUMBER string default "S2895"
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2895 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb index 7841a0e..7d7abc3 100644 --- a/src/mainboard/tyan/s2895/devicetree.cb +++ b/src/mainboard/tyan/s2895/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2895 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 466cb4a..811e9a7 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -79,10 +79,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2912 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/tyan/s2912/devicetree.cb b/src/mainboard/tyan/s2912/devicetree.cb index 11c6a73..0ce4a48 100644 --- a/src/mainboard/tyan/s2912/devicetree.cb +++ b/src/mainboard/tyan/s2912/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index 58cdb9c..d7d5114 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -80,10 +80,6 @@ config SERIAL_CPU_INIT bool default n
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2912 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb index 8373ffc..43bdeb6 100644 --- a/src/mainboard/tyan/s2912_fam10/devicetree.cb +++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig index 5147b97..0b425b9 100644 --- a/src/mainboard/tyan/s4880/Kconfig +++ b/src/mainboard/tyan/s4880/Kconfig @@ -65,8 +65,4 @@ config IRQ_SLOT_COUNT int default 22
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x4880 - endif # BOARD_TYAN_S4880 diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index cb34235..4f21cf3 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex end
device pci_domain 0 on + subsystemid 0x10f1 0x4880 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 device pci 18.0 on end # LDT1 diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig index b0d8897..3aa1690 100644 --- a/src/mainboard/tyan/s4882/Kconfig +++ b/src/mainboard/tyan/s4882/Kconfig @@ -65,8 +65,4 @@ config IRQ_SLOT_COUNT int default 22
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x4882 - endif # BOARD_TYAN_S4882 diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index d4a7017..9476c8f 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x4882 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 device pci 18.0 on # northbridge diff --git a/src/mainboard/via/Kconfig b/src/mainboard/via/Kconfig index f272247..6980548 100644 --- a/src/mainboard/via/Kconfig +++ b/src/mainboard/via/Kconfig @@ -32,8 +32,4 @@ config MAINBOARD_VENDOR string default "VIA"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1019 - endif # VENDOR_VIA diff --git a/src/mainboard/via/pc2500e/Kconfig b/src/mainboard/via/pc2500e/Kconfig index 3244ea9..70aa8d7 100644 --- a/src/mainboard/via/pc2500e/Kconfig +++ b/src/mainboard/via/pc2500e/Kconfig @@ -26,14 +26,6 @@ config IRQ_SLOT_COUNT int default 10
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1019 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0xaa51 - config VGA_BIOS_FILE string default "M14CRT.ROM" diff --git a/src/mainboard/via/pc2500e/devicetree.cb b/src/mainboard/via/pc2500e/devicetree.cb index a891ef1..05ce877 100644 --- a/src/mainboard/via/pc2500e/devicetree.cb +++ b/src/mainboard/via/pc2500e/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/via/cn700 # Northbridge device pci_domain 0 on # PCI domain + subsystemid 0x1019 0xaa51 inherit device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/wyse/Kconfig b/src/mainboard/wyse/Kconfig index 2607d6c..e4a89d9 100644 --- a/src/mainboard/wyse/Kconfig +++ b/src/mainboard/wyse/Kconfig @@ -32,8 +32,4 @@ config MAINBOARD_VENDOR string default "Wyse"
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x102d - endif # VENDOR_WYSE diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb index b88bc46..504a5de 100644 --- a/src/mainboard/wyse/s50/devicetree.cb +++ b/src/mainboard/wyse/s50/devicetree.cb @@ -28,6 +28,7 @@ chip northbridge/amd/gx2 end end device pci_domain 0 on + subsystemid 102d 0 inherit device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c index a8e8988..cfb23e6 100644 --- a/src/southbridge/intel/i82801gx/pci.c +++ b/src/southbridge/intel/i82801gx/pci.c @@ -72,12 +72,10 @@ static void ich_pci_dev_enable_resources(struct device *dev) ops = ops_pci(dev); if (dev->on_mainboard && ops && ops->set_subsystem) { printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", - dev_path(dev), - mainboard_pci_subsystem_vendor_id(dev), - mainboard_pci_subsystem_device_id(dev)); - ops->set_subsystem(dev, - mainboard_pci_subsystem_vendor_id(dev), - mainboard_pci_subsystem_device_id(dev)); + dev_path(dev), dev->subsystem_vendor, + dev->subsystem_device); + ops->set_subsystem(dev, dev->subsystem_vendor, + dev->subsystem_device); }
command = pci_read_config16(dev, PCI_COMMAND);
Sven Schnelle wrote:
158 files changed, 120 insertions(+), 561 deletions(-)
Signed-off-by and commit message is missing. But:
Acked-by: Peter Stuge peter@stuge.se
Peter Stuge peter@stuge.se writes:
Sven Schnelle wrote:
158 files changed, 120 insertions(+), 561 deletions(-)
Signed-off-by and commit message is missing. But:
Acked-by: Peter Stuge peter@stuge.se
r6421, thanks.
~sven