I think CAR for AMD Opteron MB esp Tyan MBs are validated.
I don't understand the #ifdef cause problem....
And I didn't enable that on other MB that I can test.
Also I didn't enable dual support for other MB too.
You should know some MB don't support dual core because VRM problem...., you could burn out the MB...
So you could enable the dual core support for the MB that is not validated or talk to HW engineers of the MB vendors....
YH
-----Original Message----- From: Jason Schildt [mailto:jschildt@lnxi.com] Sent: Tuesday, September 06, 2005 10:48 AM To: Lu, Yinghai Cc: linuxbios@openbios.org Subject: Re: [LinuxBIOS] LNXI Merge: lnxi-patch-15/16
On Fri, Sep 02, 2005 at 03:26:56PM -0700, Lu, Yinghai wrote:
Any reason for you disabling Cache as RAM for Tyan MB?
At this point the only way we could get all of the Opteron type boards to build was to temporarily disable CAR. The CAR implimentation was riddled with #IFDEFs and in some cases multiple layers of nested #IFDEFs that made the code very difficult to manage. The CAR issue is definitely something that needs to be discussed at the LinuxBIOS Summit in October with everyone involved coming to an agreement on how it should work. At the very least, CAR should be tested on all of the affected boards before commiting them to the repository. We simply want things to work reliably. If you want to enable CAR for a board that has been tested and is known to work, then it is a local decision. But by default we need something that is stable and manageable for everyone.
--jason--
YH
-----Original Message----- From: linuxbios-bounces@openbios.org [mailto:linuxbios-bounces@openbios.org] On Behalf Of jason schildt Sent: Friday, September 02, 2005 3:04 PM To: linuxbios@openbios.org Subject: [LinuxBIOS] LNXI Merge: lnxi-patch-15/16
DESCRIPTION:
## lnxi-patch-15 ## src/mainboard/.../Options.lb Disabled cache_as_ram: USE_CACHE_RAM CONFIG_USE_INIT tyan/s2881/Options.lb tyan/s2882/Options.lb tyan/s2891/Options.lb tyan/s4880/Options.lb tyan/s2892/Options.lb tyan/s2875/Options.lb tyan/s4882/Options.lb tyan/s2885/Options.lb tyan/s2895/Options.lb
DIFFSTAT:
s2875/Options.lb | 4 ++-- s2881/Options.lb | 4 ++-- s2882/Options.lb | 4 ++-- s2885/Options.lb | 4 ++-- s2891/Options.lb | 4 ++-- s2892/Options.lb | 4 ++-- s2895/Options.lb | 4 ++-- s4880/Options.lb | 4 ++-- s4882/Options.lb | 4 ++-- 9 files changed, 18 insertions(+), 18 deletions(-)
PATCH:
Index: s2881/Options.lb
--- s2881/Options.lb (revision 1105) +++ s2881/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s2882/Options.lb =================================================================== --- s2882/Options.lb (revision 1105) +++ s2882/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s2891/Options.lb =================================================================== --- s2891/Options.lb (revision 1105) +++ s2891/Options.lb (working copy) @@ -139,10 +139,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## Index: s4880/Options.lb =================================================================== --- s4880/Options.lb (revision 1105) +++ s4880/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s2892/Options.lb =================================================================== --- s2892/Options.lb (revision 1105) +++ s2892/Options.lb (working copy) @@ -139,10 +139,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## Index: s2875/Options.lb =================================================================== --- s2875/Options.lb (revision 1105) +++ s2875/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s4882/Options.lb =================================================================== --- s4882/Options.lb (revision 1105) +++ s4882/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s2885/Options.lb =================================================================== --- s2885/Options.lb (revision 1105) +++ s2885/Options.lb (working copy) @@ -130,10 +130,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC Index: s2895/Options.lb =================================================================== --- s2895/Options.lb (revision 1105) +++ s2895/Options.lb (working copy) @@ -136,10 +136,10 @@ ## ## enable CACHE_AS_RAM specifics ## -default USE_DCACHE_RAM=1 +default USE_DCACHE_RAM=0 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0
## ## Build code to setup a generic IOAPIC
-- Jason W. Schildt LinuxBIOS Software Engineer Linux Networx
-- LinuxBIOS mailing list LinuxBIOS@openbios.org http://www.openbios.org/mailman/listinfo/linuxbios
"Lu, Yinghai" yinghai.lu@amd.com writes:
I think CAR for AMD Opteron MB esp Tyan MBs are validated.
I don't understand the #ifdef cause problem....
And I didn't enable that on other MB that I can test.
Also I didn't enable dual support for other MB too.
You should know some MB don't support dual core because VRM problem...., you could burn out the MB...
So you could enable the dual core support for the MB that is not validated or talk to HW engineers of the MB vendors....
Agreed. And we have not. CONFIG_MAX_SIBLINGS is not defined.
A better explanation is that we had fundamental code cleanups that conflict with the current CAR implementation. In particular look at k8_init_and_stop_secondaries() from patch 4/16.
It dramatically reduces the code duplication in auto.c by factoring out a common function. It was felt that maintainable code was preferable to an optional feature.
The problem is that our method of detecting an init in early_mtrr_init_detected() while general purpose doesn't work if you have already played with the mttrs as the CAR code does. So either a new technique init detection is needed or we need to pass in a flag.
It should only be a few days work to fix the CAR code, to work with the greatly simplified code base.
There was also a practical concern with the CAR in that you cannot test changes to it except by flashing fallback which is contrary to the spirit of fallback/normal image separation.
Again all minor practical problems, and not a criticism on the technique itself.
Eric
-
ebiederman＠lnxi.com -
Lu, Yinghai