I'm looking at mainboard_fixup() provided in the digitallogic/smartcore-p5.
In particular, the bit where they're turning off SMI.
With my trusty piix4e manual on one desktop and the code in another, I find myself confused.
Around line 165 it says it's verifying SMI is disabled. It then goes and sets bit 25 of register 58. On page 126 of the piix4e manual it says that setting bit 25 will turn ON the generation of SMI# when the APMC register is read.
Also, what is on I/O port 0xb2?
Regards, Andrew