[v2] r4923 - in trunk/src: mainboard/amd/dbm690t mainboard/amd/pistachio mainboard/arima/hdama mainboard/asi/mb_5blmp mainboard/asus/mew-vm mainboard/broadcom/blast mainboard/digitallogic/msm586seg mainboard/gigabyte/ga_2761gxdk mainboard/hp/e_vectra_p2706t mainboard/ibm/e326 mainboard/intel/d945gclf mainboard/iwill/dk8_htx mainboard/kontron/986lcd-m mainboard/kontron/kt690 mainboard/mitac/6513wu mainboard/msi/ms6178 mainboard/msi/ms9185 mainboard/msi/ms9282 mainboard/nec/powermate2000 mainboard/
Author: myles Date: 2009-11-06 17:11:05 +0000 (Fri, 06 Nov 2009) New Revision: 4923
Modified: trunk/src/mainboard/amd/dbm690t/Config.lb trunk/src/mainboard/amd/dbm690t/devicetree.cb trunk/src/mainboard/amd/pistachio/Config.lb trunk/src/mainboard/amd/pistachio/devicetree.cb trunk/src/mainboard/arima/hdama/Config.lb trunk/src/mainboard/arima/hdama/devicetree.cb trunk/src/mainboard/asi/mb_5blmp/Config.lb trunk/src/mainboard/asi/mb_5blmp/devicetree.cb trunk/src/mainboard/asus/mew-vm/Config.lb trunk/src/mainboard/asus/mew-vm/devicetree.cb trunk/src/mainboard/broadcom/blast/Config.lb trunk/src/mainboard/broadcom/blast/devicetree.cb trunk/src/mainboard/digitallogic/msm586seg/Config.lb trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb trunk/src/mainboard/gigabyte/ga_2761gxdk/Config.lb trunk/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb trunk/src/mainboard/hp/e_vectra_p2706t/Config.lb trunk/src/mainboard/hp/e_vectra_p2706t/devicetree.cb trunk/src/mainboard/ibm/e326/Config.lb trunk/src/mainboard/ibm/e326/devicetree.cb trunk/src/mainboard/intel/d945gclf/Config.lb trunk/src/mainboard/intel/d945gclf/devicetree.cb trunk/src/mainboard/iwill/dk8_htx/Config.lb trunk/src/mainboard/iwill/dk8_htx/devicetree.cb trunk/src/mainboard/kontron/986lcd-m/Config.lb trunk/src/mainboard/kontron/986lcd-m/devicetree.cb trunk/src/mainboard/kontron/kt690/Config.lb trunk/src/mainboard/kontron/kt690/devicetree.cb trunk/src/mainboard/mitac/6513wu/Config.lb trunk/src/mainboard/mitac/6513wu/devicetree.cb trunk/src/mainboard/msi/ms6178/Config.lb trunk/src/mainboard/msi/ms6178/devicetree.cb trunk/src/mainboard/msi/ms9185/Config.lb trunk/src/mainboard/msi/ms9185/devicetree.cb trunk/src/mainboard/msi/ms9282/Config.lb trunk/src/mainboard/msi/ms9282/devicetree.cb trunk/src/mainboard/nec/powermate2000/Config.lb trunk/src/mainboard/nec/powermate2000/devicetree.cb trunk/src/mainboard/rca/rm4100/Config.lb trunk/src/mainboard/rca/rm4100/devicetree.cb trunk/src/mainboard/supermicro/h8dme/Config.lb trunk/src/mainboard/supermicro/h8dme/devicetree.cb trunk/src/mainboard/supermicro/h8dmr/Config.lb trunk/src/mainboard/supermicro/h8dmr/devicetree.cb trunk/src/mainboard/supermicro/h8dmr_fam10/Config.lb trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb trunk/src/mainboard/technexion/tim5690/Config.lb trunk/src/mainboard/technexion/tim5690/devicetree.cb trunk/src/mainboard/technexion/tim8690/Config.lb trunk/src/mainboard/technexion/tim8690/devicetree.cb trunk/src/mainboard/technologic/ts5300/Config.lb trunk/src/mainboard/technologic/ts5300/devicetree.cb trunk/src/mainboard/thomson/ip1000/Config.lb trunk/src/mainboard/thomson/ip1000/devicetree.cb trunk/src/mainboard/tyan/s2850/Config.lb trunk/src/mainboard/tyan/s2850/devicetree.cb trunk/src/mainboard/tyan/s2875/Config.lb trunk/src/mainboard/tyan/s2875/devicetree.cb trunk/src/mainboard/tyan/s2880/Config.lb trunk/src/mainboard/tyan/s2880/devicetree.cb trunk/src/mainboard/tyan/s2881/Config.lb trunk/src/mainboard/tyan/s2881/devicetree.cb trunk/src/mainboard/tyan/s2882/Config.lb trunk/src/mainboard/tyan/s2882/devicetree.cb trunk/src/mainboard/tyan/s2912_fam10/Config.lb trunk/src/mainboard/tyan/s2912_fam10/devicetree.cb trunk/src/mainboard/tyan/s4880/Config.lb trunk/src/mainboard/tyan/s4880/devicetree.cb trunk/src/mainboard/tyan/s4882/Config.lb trunk/src/mainboard/tyan/s4882/devicetree.cb trunk/src/mainboard/via/vt8454c/Config.lb trunk/src/mainboard/via/vt8454c/devicetree.cb trunk/src/southbridge/amd/rs690/chip.h Log: Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.
Since we have CBFS setting rom_address in board files is no longer necessary.
Also, drop vga_rom_address from RS690 completely, it was never used in the code.
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Myles Watson mylesgw@gmail.com
Modified: trunk/src/mainboard/amd/dbm690t/Config.lb =================================================================== --- trunk/src/mainboard/amd/dbm690t/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/amd/dbm690t/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -157,7 +157,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Modified: trunk/src/mainboard/amd/dbm690t/devicetree.cb =================================================================== --- trunk/src/mainboard/amd/dbm690t/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/amd/dbm690t/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -22,7 +22,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Modified: trunk/src/mainboard/amd/pistachio/Config.lb =================================================================== --- trunk/src/mainboard/amd/pistachio/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/amd/pistachio/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -158,7 +158,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Modified: trunk/src/mainboard/amd/pistachio/devicetree.cb =================================================================== --- trunk/src/mainboard/amd/pistachio/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/amd/pistachio/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -23,7 +23,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Modified: trunk/src/mainboard/arima/hdama/Config.lb =================================================================== --- trunk/src/mainboard/arima/hdama/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/arima/hdama/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -179,7 +179,6 @@ device pci 1.0 off end # LAN chip drivers/pci/onboard device pci 6.0 on end # ATI Rage XL - register "rom_address" = "0xfff80000" end ## PCI Slot 5 (correct?) #chip drivers/generic/generic
Modified: trunk/src/mainboard/arima/hdama/devicetree.cb =================================================================== --- trunk/src/mainboard/arima/hdama/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/arima/hdama/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -75,7 +75,6 @@ device pci 1.0 off end # LAN chip drivers/pci/onboard device pci 6.0 on end # ATI Rage XL - register "rom_address" = "0xfff80000" end ## PCI Slot 5 (correct?) #chip drivers/generic/generic
Modified: trunk/src/mainboard/asi/mb_5blmp/Config.lb =================================================================== --- trunk/src/mainboard/asi/mb_5blmp/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/asi/mb_5blmp/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -138,9 +138,6 @@ # device pci 12.4 on # VGA (onboard) # chip drivers/pci/onboard # device pci 12.4 on end - # register "rom_address" = "0xfffc0000" # 256 KB image - # # register "rom_address" = "0xfff80000" # 512 KB image - # # register "rom_address" = "0xfff00000" # 1 MB image # end # end device pci 13.0 on end # USB
Modified: trunk/src/mainboard/asi/mb_5blmp/devicetree.cb =================================================================== --- trunk/src/mainboard/asi/mb_5blmp/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/asi/mb_5blmp/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -40,9 +40,6 @@ # device pci 12.4 on # VGA (onboard) # chip drivers/pci/onboard # device pci 12.4 on end - # register "rom_address" = "0xfffc0000" # 256 KB image - # # register "rom_address" = "0xfff80000" # 512 KB image - # # register "rom_address" = "0xfff00000" # 1 MB image # end # end device pci 13.0 on end # USB
Modified: trunk/src/mainboard/asus/mew-vm/Config.lb =================================================================== --- trunk/src/mainboard/asus/mew-vm/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/asus/mew-vm/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -99,7 +99,6 @@ device pci 1.0 on # Onboard Video #chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" #end end chip southbridge/intel/i82801xx # Southbridge @@ -109,7 +108,6 @@ device pci 1e.0 on # PCI Bridge #chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" #end end device pci 1f.0 on # ISA/LPC? Bridge
Modified: trunk/src/mainboard/asus/mew-vm/devicetree.cb =================================================================== --- trunk/src/mainboard/asus/mew-vm/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/asus/mew-vm/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -4,7 +4,6 @@ device pci 1.0 on # Onboard Video #chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" #end end chip southbridge/intel/i82801xx # Southbridge @@ -14,7 +13,6 @@ device pci 1e.0 on # PCI Bridge #chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" #end end device pci 1f.0 on # ISA/LPC? Bridge
Modified: trunk/src/mainboard/broadcom/blast/Config.lb =================================================================== --- trunk/src/mainboard/broadcom/blast/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/broadcom/blast/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -211,7 +211,6 @@ chip drivers/pci/onboard device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4 - register "rom_address" = "0xfff80000" end end #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) @@ -220,7 +219,6 @@ # end # chip drivers/pci/onboard # device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end
Modified: trunk/src/mainboard/broadcom/blast/devicetree.cb =================================================================== --- trunk/src/mainboard/broadcom/blast/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/broadcom/blast/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -109,7 +109,6 @@ chip drivers/pci/onboard device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4 - register "rom_address" = "0xfff80000" end end #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) @@ -118,7 +117,6 @@ # end # chip drivers/pci/onboard # device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end
Modified: trunk/src/mainboard/digitallogic/msm586seg/Config.lb =================================================================== --- trunk/src/mainboard/digitallogic/msm586seg/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/digitallogic/msm586seg/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -108,7 +108,6 @@ end chip drivers/pci/onboard device pci 14.0 on end # 69000 - register "rom_address" = "0x2000000" end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}"
Modified: trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb =================================================================== --- trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -7,7 +7,6 @@ end chip drivers/pci/onboard device pci 14.0 on end # 69000 - register "rom_address" = "0x2000000" end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}"
Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/Config.lb =================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -180,7 +180,6 @@ device pci 1.0 on # AGP bridge chip drivers/pci/onboard # Integrated VGA device pci 0.0 on end - register "rom_address" = "0xfff80000" end end device pci 2.0 on # LPC
Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb =================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -13,7 +13,6 @@ device pci 1.0 on # AGP bridge chip drivers/pci/onboard # Integrated VGA device pci 0.0 on end - register "rom_address" = "0xfff80000" end end device pci 2.0 on # LPC
Modified: trunk/src/mainboard/hp/e_vectra_p2706t/Config.lb =================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/hp/e_vectra_p2706t/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -78,7 +78,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1"
Modified: trunk/src/mainboard/hp/e_vectra_p2706t/devicetree.cb =================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/hp/e_vectra_p2706t/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -9,7 +9,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1"
Modified: trunk/src/mainboard/ibm/e326/Config.lb =================================================================== --- trunk/src/mainboard/ibm/e326/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/ibm/e326/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -127,7 +127,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 5.0 on end # ATI Rage XL - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/ibm/e326/devicetree.cb =================================================================== --- trunk/src/mainboard/ibm/e326/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/ibm/e326/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -23,7 +23,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 5.0 on end # ATI Rage XL - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/intel/d945gclf/Config.lb =================================================================== --- trunk/src/mainboard/intel/d945gclf/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/intel/d945gclf/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -152,9 +152,6 @@ device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - # register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller
Modified: trunk/src/mainboard/intel/d945gclf/devicetree.cb =================================================================== --- trunk/src/mainboard/intel/d945gclf/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/intel/d945gclf/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -30,9 +30,6 @@ device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - # register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller
Modified: trunk/src/mainboard/iwill/dk8_htx/Config.lb =================================================================== --- trunk/src/mainboard/iwill/dk8_htx/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/iwill/dk8_htx/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -234,7 +234,6 @@ device pci 1.0 off end #chip drivers/pci/onboard # device pci 6.0 on end - # register "rom_address" = "0xfff80000" #end end device pci 1.0 on
Modified: trunk/src/mainboard/iwill/dk8_htx/devicetree.cb =================================================================== --- trunk/src/mainboard/iwill/dk8_htx/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/iwill/dk8_htx/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -26,7 +26,6 @@ device pci 1.0 off end #chip drivers/pci/onboard # device pci 6.0 on end - # register "rom_address" = "0xfff80000" #end end device pci 1.0 on
Modified: trunk/src/mainboard/kontron/986lcd-m/Config.lb =================================================================== --- trunk/src/mainboard/kontron/986lcd-m/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/kontron/986lcd-m/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -155,9 +155,6 @@ # device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller
Modified: trunk/src/mainboard/kontron/986lcd-m/devicetree.cb =================================================================== --- trunk/src/mainboard/kontron/986lcd-m/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/kontron/986lcd-m/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -11,9 +11,6 @@ device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller
Modified: trunk/src/mainboard/kontron/kt690/Config.lb =================================================================== --- trunk/src/mainboard/kontron/kt690/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/kontron/kt690/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -134,7 +134,6 @@ #The variables belong to mainboard are defined here.
#Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff0000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -158,7 +157,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -168,7 +166,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff00000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/kontron/kt690/devicetree.cb =================================================================== --- trunk/src/mainboard/kontron/kt690/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/kontron/kt690/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -1,5 +1,4 @@ #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff0000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -23,7 +22,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -33,7 +31,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff00000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/mitac/6513wu/Config.lb =================================================================== --- trunk/src/mainboard/mitac/6513wu/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/mitac/6513wu/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -82,7 +82,6 @@ device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) chip drivers/pci/onboard device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x03"
Modified: trunk/src/mainboard/mitac/6513wu/devicetree.cb =================================================================== --- trunk/src/mainboard/mitac/6513wu/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/mitac/6513wu/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -28,7 +28,6 @@ device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) chip drivers/pci/onboard device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x03"
Modified: trunk/src/mainboard/msi/ms6178/Config.lb =================================================================== --- trunk/src/mainboard/msi/ms6178/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms6178/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -77,7 +77,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1"
Modified: trunk/src/mainboard/msi/ms6178/devicetree.cb =================================================================== --- trunk/src/mainboard/msi/ms6178/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms6178/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -28,7 +28,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1"
Modified: trunk/src/mainboard/msi/ms9185/Config.lb =================================================================== --- trunk/src/mainboard/msi/ms9185/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms9185/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -211,7 +211,6 @@ chip drivers/pci/onboard device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - register "rom_address" = "0xfff80000" end #bx_a013+ start #chip drivers/pci/onboard #SATA2 @@ -229,7 +228,6 @@ # end # chip drivers/pci/onboard # device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end
end # device pci 18.0
Modified: trunk/src/mainboard/msi/ms9185/devicetree.cb =================================================================== --- trunk/src/mainboard/msi/ms9185/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms9185/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -77,7 +77,6 @@ chip drivers/pci/onboard device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - register "rom_address" = "0xfff80000" end #bx_a013+ start #chip drivers/pci/onboard #SATA2 @@ -95,7 +94,6 @@ # end # chip drivers/pci/onboard # device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end
end # device pci 18.0
Modified: trunk/src/mainboard/msi/ms9282/Config.lb =================================================================== --- trunk/src/mainboard/msi/ms9282/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms9282/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -280,7 +280,6 @@ device pci 6.0 on #P2P chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff80000" end end # P2P device pci 7.0 on end # reserve
Modified: trunk/src/mainboard/msi/ms9282/devicetree.cb =================================================================== --- trunk/src/mainboard/msi/ms9282/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/msi/ms9282/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -139,7 +139,6 @@ device pci 6.0 on #P2P chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff80000" end end # P2P device pci 7.0 on end # reserve
Modified: trunk/src/mainboard/nec/powermate2000/Config.lb =================================================================== --- trunk/src/mainboard/nec/powermate2000/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/nec/powermate2000/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -78,7 +78,6 @@ device pci 1.0 off # Onboard video # chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" # end end chip southbridge/intel/i82801xx # Southbridge
Modified: trunk/src/mainboard/nec/powermate2000/devicetree.cb =================================================================== --- trunk/src/mainboard/nec/powermate2000/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/nec/powermate2000/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -9,7 +9,6 @@ device pci 1.0 off # Onboard video # chip drivers/pci/onboard # device pci 1.0 on end - # register "rom_address" = "0xfff80000" # end end chip southbridge/intel/i82801xx # Southbridge
Modified: trunk/src/mainboard/rca/rm4100/Config.lb =================================================================== --- trunk/src/mainboard/rca/rm4100/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/rca/rm4100/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -77,7 +77,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 2.0 on end # VGA (Intel 82830 CGC) - register "rom_address" = "0xfff00000" end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05"
Modified: trunk/src/mainboard/rca/rm4100/devicetree.cb =================================================================== --- trunk/src/mainboard/rca/rm4100/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/rca/rm4100/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -3,7 +3,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 2.0 on end # VGA (Intel 82830 CGC) - register "rom_address" = "0xfff00000" end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05"
Modified: trunk/src/mainboard/supermicro/h8dme/Config.lb =================================================================== --- trunk/src/mainboard/supermicro/h8dme/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dme/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -256,8 +256,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/supermicro/h8dme/devicetree.cb =================================================================== --- trunk/src/mainboard/supermicro/h8dme/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dme/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -94,8 +94,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/supermicro/h8dmr/Config.lb =================================================================== --- trunk/src/mainboard/supermicro/h8dmr/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dmr/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -278,8 +278,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/supermicro/h8dmr/devicetree.cb =================================================================== --- trunk/src/mainboard/supermicro/h8dmr/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dmr/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -114,8 +114,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/Config.lb =================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -282,8 +282,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb =================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -116,8 +116,6 @@ device pci 6.0 on # PCI chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" #for 1M -# register "rom_address" = "0xfff80000" #for 512K end end device pci 6.1 on end # AZA
Modified: trunk/src/mainboard/technexion/tim5690/Config.lb =================================================================== --- trunk/src/mainboard/technexion/tim5690/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technexion/tim5690/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -134,7 +134,6 @@ #The variables belong to mainboard are defined here.
#Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff80000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -158,10 +157,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff80000" #512KB - #register "rom_address" = "0xfff00000" #1024KB - #register "rom_address" = "0xffe00000" #2048KB - #register "rom_address" = "0xffc00000" #4096KB end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -171,10 +166,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff80000" - #register "vga_rom_address" = "0xfff00000" - #register "vga_rom_address" = "0xffe00000" - #register "vga_rom_address" = "0xffc00000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/technexion/tim5690/devicetree.cb =================================================================== --- trunk/src/mainboard/technexion/tim5690/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technexion/tim5690/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -1,5 +1,4 @@ #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff80000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -23,10 +22,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff80000" #512KB - #register "rom_address" = "0xfff00000" #1024KB - #register "rom_address" = "0xffe00000" #2048KB - #register "rom_address" = "0xffc00000" #4096KB end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -36,10 +31,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff80000" - #register "vga_rom_address" = "0xfff00000" - #register "vga_rom_address" = "0xffe00000" - #register "vga_rom_address" = "0xffc00000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/technexion/tim8690/Config.lb =================================================================== --- trunk/src/mainboard/technexion/tim8690/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technexion/tim8690/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -134,7 +134,6 @@ #The variables belong to mainboard are defined here.
#Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff80000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -158,7 +157,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff80000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -168,7 +166,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff80000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/technexion/tim8690/devicetree.cb =================================================================== --- trunk/src/mainboard/technexion/tim8690/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technexion/tim8690/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -1,5 +1,4 @@ #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) -#Define vga_rom_address = 0xfff80000 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, # 1: the system allows a PCIE link to be established on Dev2 or Dev3. @@ -23,7 +22,6 @@ device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff80000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 @@ -33,7 +31,6 @@ device pci 6.0 on end # PCIE P2P bridge 0x7916 device pci 7.0 on end # PCIE P2P bridge 0x7917 device pci 8.0 off end # NB/SB Link P2P bridge - register "vga_rom_address" = "0xfff80000" register "gpp_configuration" = "4" register "port_enable" = "0xfc" register "gfx_dev2_dev3" = "1"
Modified: trunk/src/mainboard/technologic/ts5300/Config.lb =================================================================== --- trunk/src/mainboard/technologic/ts5300/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technologic/ts5300/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -109,7 +109,6 @@ # end # chip drivers/pci/onboard # device pci 14.0 on end # 69000 -# register "rom_address" = "0x2000000" # end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}"
Modified: trunk/src/mainboard/technologic/ts5300/devicetree.cb =================================================================== --- trunk/src/mainboard/technologic/ts5300/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/technologic/ts5300/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -7,7 +7,6 @@ # end # chip drivers/pci/onboard # device pci 14.0 on end # 69000 -# register "rom_address" = "0x2000000" # end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}"
Modified: trunk/src/mainboard/thomson/ip1000/Config.lb =================================================================== --- trunk/src/mainboard/thomson/ip1000/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/thomson/ip1000/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -77,7 +77,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 2.0 on end # VGA (Intel 82830 CGC) - register "rom_address" = "0xfff00000" end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05"
Modified: trunk/src/mainboard/thomson/ip1000/devicetree.cb =================================================================== --- trunk/src/mainboard/thomson/ip1000/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/thomson/ip1000/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -3,7 +3,6 @@ device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 2.0 on end # VGA (Intel 82830 CGC) - register "rom_address" = "0xfff00000" end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05"
Modified: trunk/src/mainboard/tyan/s2850/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2850/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2850/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -121,7 +121,6 @@ #chip drivers/ati/ragexl chip drivers/pci/onboard device pci b.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2850/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2850/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2850/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -19,7 +19,6 @@ #chip drivers/ati/ragexl chip drivers/pci/onboard device pci b.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2875/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2875/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2875/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -125,7 +125,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 5.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2875/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2875/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2875/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -23,7 +23,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 5.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2880/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2880/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2880/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -140,7 +140,6 @@ end chip drivers/pci/onboard device pci 6.0 on end #adti - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2880/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2880/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2880/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -38,7 +38,6 @@ end chip drivers/pci/onboard device pci 6.0 on end #adti - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2881/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2881/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2881/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -141,7 +141,6 @@ end chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2881/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2881/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2881/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -39,7 +39,6 @@ end chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s2882/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2882/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2882/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -141,7 +141,6 @@ # chip drivers/ati/ragexl chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" end chip drivers/pci/onboard device pci 8.0 on end #intel 10/100
Modified: trunk/src/mainboard/tyan/s2882/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2882/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2882/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -39,7 +39,6 @@ # chip drivers/ati/ragexl chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff00000" end chip drivers/pci/onboard device pci 8.0 on end #intel 10/100
Modified: trunk/src/mainboard/tyan/s2912_fam10/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2912_fam10/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -281,7 +281,6 @@ device pci 6.0 on chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff00000" end end # PCI device pci 6.1 off end # AZA
Modified: trunk/src/mainboard/tyan/s2912_fam10/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s2912_fam10/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -114,7 +114,6 @@ device pci 6.0 on chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff00000" end end # PCI device pci 6.1 off end # AZA
Modified: trunk/src/mainboard/tyan/s4880/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s4880/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s4880/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -135,7 +135,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s4880/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s4880/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s4880/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -38,7 +38,6 @@ device pci 1.0 off end chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end end device pci 1.0 on
Modified: trunk/src/mainboard/tyan/s4882/Config.lb =================================================================== --- trunk/src/mainboard/tyan/s4882/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s4882/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -134,7 +134,6 @@ #chip drivers/ati/ragexl chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end chip drivers/pci/onboard device pci 5.0 on end #SiI
Modified: trunk/src/mainboard/tyan/s4882/devicetree.cb =================================================================== --- trunk/src/mainboard/tyan/s4882/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/tyan/s4882/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -37,7 +37,6 @@ #chip drivers/ati/ragexl chip drivers/pci/onboard device pci 6.0 on end - register "rom_address" = "0xfff80000" end chip drivers/pci/onboard device pci 5.0 on end #SiI
Modified: trunk/src/mainboard/via/vt8454c/Config.lb =================================================================== --- trunk/src/mainboard/via/vt8454c/Config.lb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/via/vt8454c/Config.lb 2009-11-06 17:11:05 UTC (rev 4923) @@ -123,9 +123,6 @@ device pci 1.0 on # PCI Bridge chip drivers/pci/onboard device pci 0.0 on end - #register "rom_address" = "0xfffc0000" #256k image - register "rom_address" = "0xfff80000" #512k image - #register "rom_address" = "0xfff00000" #1024k image end # Onboard Video end # PCI Bridge device pci f.0 on end # IDE/SATA
Modified: trunk/src/mainboard/via/vt8454c/devicetree.cb =================================================================== --- trunk/src/mainboard/via/vt8454c/devicetree.cb 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/mainboard/via/vt8454c/devicetree.cb 2009-11-06 17:11:05 UTC (rev 4923) @@ -14,9 +14,6 @@ device pci 1.0 on # PCI Bridge chip drivers/pci/onboard device pci 0.0 on end - #register "rom_address" = "0xfffc0000" #256k image - register "rom_address" = "0xfff80000" #512k image - #register "rom_address" = "0xfff00000" #1024k image end # Onboard Video end # PCI Bridge device pci f.0 on end # IDE/SATA
Modified: trunk/src/southbridge/amd/rs690/chip.h =================================================================== --- trunk/src/southbridge/amd/rs690/chip.h 2009-11-06 17:09:11 UTC (rev 4922) +++ trunk/src/southbridge/amd/rs690/chip.h 2009-11-06 17:11:05 UTC (rev 4923) @@ -23,7 +23,6 @@ /* Member variables are defined in Config.lb. */ struct southbridge_amd_rs690_config { - u32 vga_rom_address; /* The location that the VGA rom has been appened. */ u8 gpp_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */ u8 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */ u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */
-
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