Corey Osgood wrote:
So, I commented all the do_ram_commands out (since I can't see the problem with it) and did ram init using pci_write_config16, setting what I know the values should be, and then NOP would not report as being set (and ram still failed). So, I set up a for loop to set NOP until the northbridge reported that it was set...I got an infinite loop. My loop might be wrong (it's a bit hackish), can someone tell me if it should work? Or does NOP simply not set?
/* 3. Apply NOP. */ RAM_DEBUG_MESSAGE("Ram Enable 3: Apply NOP\r\n"); int s; for( s = 0; s != 0110; s = pci_read_config16( ctrl->d0, SDRAMC ) ) { RAM_DEBUG_MESSAGE("Do NOPs til it cooperates!\r\n"); pci_write_config8(ctrl->d0, SDRAMC, 0x0110); read32(0x04000000); EXTRA_DELAY }
Hello Everyone,
I am also new to LinuxBIOS and I've been working on porting and updating the SPD code from v1 assembly to v2. I think odinhorse's previous comment is likely to be true, although I think this is probably what he meant to say:
for( s = 0; (s & 0x3ff) != 0x0110; s = pci_read_config16( ctrl->d0, SDRAMC ) ) {
or:
for( s = 0; s != 0x0110; s = pci_read_config16( ctrl->d0, SDRAMC ) & 0x3fff ) {
I don't know which one is more correct, so whatever floats your boat. Other than that, I don't see why it wouldn't work. I don't have a suitable test system to test this with, so hope it helps!
Alfred
Alfred Wanga wrote:
Corey Osgood wrote:
So, I commented all the do_ram_commands out (since I can't see the problem with it) and did ram init using pci_write_config16, setting what I know the values should be, and then NOP would not report as being set (and ram still failed). So, I set up a for loop to set NOP until the northbridge reported that it was set...I got an infinite loop. My loop might be wrong (it's a bit hackish), can someone tell me if it should work? Or does NOP simply not set?
/* 3. Apply NOP. */ RAM_DEBUG_MESSAGE("Ram Enable 3: Apply NOP\r\n"); int s; for( s = 0; s != 0110; s = pci_read_config16( ctrl->d0, SDRAMC ) ) { RAM_DEBUG_MESSAGE("Do NOPs til it cooperates!\r\n"); pci_write_config8(ctrl->d0, SDRAMC, 0x0110); read32(0x04000000); EXTRA_DELAY }
Hello Everyone,
I am also new to LinuxBIOS and I've been working on porting and updating the SPD code from v1 assembly to v2. I think odinhorse's previous comment is likely to be true, although I think this is probably what he meant to say:
for( s = 0; (s & 0x3ff) != 0x0110; s = pci_read_config16( ctrl->d0, SDRAMC ) ) {
or:
for( s = 0; s != 0x0110; s = pci_read_config16( ctrl->d0, SDRAMC ) & 0x3fff ) {
I don't know which one is more correct, so whatever floats your boat. Other than that, I don't see why it wouldn't work. I don't have a suitable test system to test this with, so hope it helps!
Alfred
Erm, it was actually wrong, the value of SDRAMC was wrong, it should have been 0x0120, which set just fine (and didn't need that loop at all). That was completely my bad, I'm still getting used to starting to count at 0 (I was thinking the third digit was bits 8-5 and not 7-4). Uwe's do_ram_command() code works perfectly fine in that respect, but still no luck on getting the ram working. I've also done a port of the i440gx (the c version) from v1 to 440bx and v2, that also didn't work out. If you can get a working port from the assembly version, it'd be awesome! Please keep us in the loop, and ask away if you have any questions.
-Corey
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Alfred Wanga -
Corey Osgood