Re: [coreboot] Problems with Coreboot and SeaBIOS on VIA EPIA-M

Hi,

On 8/24/2014 at 1:48 AM, "ron minnich"  wrote:
> Hi,
>
> when I'm having trouble with lzma what I do is not build a payload,
> and run the ramstage uncompressed, and at least make sure that 
> works.

I tried that as well and it does work indeed. It does basically the same thing
as if I apply that "hack" to define that LZMA constant, as I mentioned before.
In both cases the coreboot initializations seems to be fine, as far as I can tell.
> I think this is your real problem, as you say.
>
> Trying CBFS ramstage loader.
> CBFS: loading stage fallback/ramstage @ 0x100000 (151600 bytes), 
> entry
> @ 0x100000
> CBFS: tried to decompress 43540 bytes with algorithm #1,but that
> algorithm id is unsupported.
> Ramstage was not loaded!
>
> This is really weird. But I don't think you should go one step 
> further
> until you see why this is happening, because it points to other 
> bigger
> problems.
> BTW, when you omitted the vga bios, did you rebuild seabios to not
> expect vga to be present?

I think I did. I thought the CONFIG_NO_VGABIOS=y in my SeaBIOS
config was what I needed, but if there is anything else I need to
configure, maybe I have missed it.
> I don't think the issue is the lzma compression does not work. 
> Somehow
> the config step is broken, and if that variable is not set right,
> others may not be set right either. The integrity of your build is
> questionable.

You are probably right. The reason I wanted to get that LZMA compression
to work was that I then could use a more default SeaBIOS configuration.
I figured that there would be less possibilities for me to break the
SeaBIOS configuration, when I don't have to disable lots of features to
save space to make it fit uncompressed on the flash chip.
> When's the last time we had a success with EPIA-M? I just don't
> recall, anyone know?
>
> ron

xchip