Dear Keith,
Thank you for uploading the logs of the Asus P2B-LS to coreboot’s board status repository [1].
asus/p2b-ls/4.11-711-gd913036e18/2020-01-05T00_12_56Z
Two notes:
1. The version in the logs unfortunately contain the *dirty* tag. Could you run `git status` or `git diff` to see what the differences are and maybe upload “clean” logs?
2. Please rebuild CBMEM, so it knows about all time stamp names.
3. With C environment bootblock CBMEM timestamp collection seems to work now.
25 entries total:
0:1st timestamp 980 11:start of bootblock 6,307 (5,326) 12:end of bootblock 6,590 (283) 13:starting to load romstage 8,231 (1,641) 14:finished loading romstage 8,373 (141) 1:start of rom stage 8,930 (556) 4:end of romstage 3,166,633 (3,157,703)
romstage seems to take 3 seconds, which seems a lot. Do you have serial logs with timestamps, for example, `readserial.py` in SeaBIOS’ repository, for comparison with romcc bootblock? (Or you can enable to have timestamps printed to the console, so they
100:<unknown> 3,331,673 (165,039) 101:<unknown> 3,331,674 (0)
Please rebuild cbmem.
8:starting to load ramstage 3,348,277 (16,603) 15:starting LZMA decompress (ignore for x86) 3,353,834 (5,557) 16:finished LZMA decompress (ignore for x86) 3,400,159 (46,324) 9:finished loading ramstage 3,411,813 (11,654) 10:start of ramstage 3,427,503 (15,689) 30:device enumeration 3,427,508 (4) 40:device configuration 3,648,839 (221,330) 50:device enable 4,926,610 (1,277,771)
That is probably due to having the serial console enabled. Could you please do one upload with the serial console disabled?
60:device initialization 4,952,646 (26,036) 70:device setup done 5,347,654 (395,007) 75:cbmem post 5,352,364 (4,710) 80:write tables 5,352,366 (2) 85:finalize chips 5,564,523 (212,156) 90:load payload 5,569,481 (4,957) 15:starting LZMA decompress (ignore for x86) 5,614,901 (45,419) 16:finished LZMA decompress (ignore for x86) 5,684,112 (69,211) 99:selfboot jump 5,704,387 (20,274)
Total Time: 5,703,393
Is the boot time really that long, and was it the same with romcc bootblock?
Kind regards,
Paul
[1]: https://review.coreboot.org/cgit/board-status.git/tree/asus/p2b-ls/4.11-711-...