Hi, all,
I remember there is a discussion about how to allocate the PCI memory IO on a system with a 4G physical memory. I can't find it, Who could please send me the link. Thank you.
Best Regards
丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406
On Tuesday 22 April 2008, Feng, Libo wrote:
Hi, all,
I remember there is a discussion about how to allocate the PCI memory IO on a system with a 4G physical memory. I can't find it, Who could please send me the link. Thank you.
I can't recall a discussion besides a private one I had with Stefan, but both proprietary B. and coreboot leave the last GB for IO allocation, and move the last GB RAM across the border. Giving it a thought about e.g. the flash ROM et.al, and about 32 bit PCI cards and OSes, that's the natural thing to do.
HTH, Torsten
So, you mean no access will be routined to the last GB memory even it exists physically, due to FLASH ROM, PCI memory IO, APIC and OS reservation?
Best Regards
??? Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Torsten Duwe Sent: Wednesday, April 23, 2008 5:12 PM To: coreboot@coreboot.org Subject: Re: [coreboot] The discussion of PCI memory IO
On Tuesday 22 April 2008, Feng, Libo wrote:
Hi, all,
I remember there is a discussion about how to allocate the PCI memory IO on a system with a 4G physical memory. I can't find it, Who could please send me the link. Thank you.
I can't recall a discussion besides a private one I had with Stefan, but both proprietary B. and coreboot leave the last GB for IO allocation, and move the last GB RAM across the border. Giving it a thought about e.g. the flash ROM et.al, and about 32 bit PCI cards and OSes, that's the natural thing to do.
HTH, Torsten
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
On Wed, Apr 23, 2008 at 05:20:37PM +0800, Feng, Libo wrote:
So, you mean no access will be routined to the last GB memory even it exists physically, due to FLASH ROM, PCI memory IO, APIC and OS reservation?
Not with physical 32-bit addresses, but using PAE it is possible to reach beyond 4GB, where RAM over 3GB would be available.
//Peter
On Tue, Apr 22, 2008 at 12:35 AM, Feng, Libo Libo.Feng@amd.com wrote:
Hi, all,
I remember there is a discussion about how to allocate the PCI memory IO on a system with a 4G physical memory. I can't find it, Who could please send me the link. Thank you.
do you mean allocating 64bit mmio? if so, there is one option in Options.lb
YH
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Feng, Libo -
Peter Stuge -
Torsten Duwe -
yhlu