Author: stepan Date: Sat Apr 23 01:12:40 2011 New Revision: 6543 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6543
Log: Add (partly) support for Nuvoton NCT6776F
Signed-off-by: Stefan Reinauer reinauer@google.com Acked-by: Peter Stuge peter@stuge.se
Modified: trunk/util/superiotool/nuvoton.c trunk/util/superiotool/superiotool.h
Modified: trunk/util/superiotool/nuvoton.c ============================================================================== --- trunk/util/superiotool/nuvoton.c Sat Apr 23 01:10:35 2011 (r6542) +++ trunk/util/superiotool/nuvoton.c Sat Apr 23 01:12:40 2011 (r6543) @@ -66,13 +66,201 @@ {EOT}}}, {0x1a, "WPCM450", { {EOT}}}, + {0xc332, "NCT6776F (B)", { + {NOLDN, NULL, + {0x10,0x11,0x13,0x14,0x16,0x17,0x18,0x19,0x1a, + 0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23, + 0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d, + 0x2e,0x2f,EOT}, + {0xff,0xff,0x00,0x00,0xff,0xff,0xff,0xff,0xf0, + 0x78,0x00,0x00,0xff,0xff,0xc3,0x32,0xff,0x00, + 0x64,0x00,MISC,0x00,0x00,0xc0,0x00,0x81,0x00, + 0x00,MISC,EOT}}, + {0x00, "FDC", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4, + 0xf5,EOT}, + {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00, + 0x00,EOT}}, + {0x01, "Parallel Port", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}}, + {0x02, "UART A", + {0x30,0x60,0x61,0x70,0xf0,0xf2,EOT}, + {0x01,0x03,0xf8,0x04,0x00,0x00,EOT}}, + {0x03, "UART B, IR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT}, + {0x01,0x02,0xf8,0x03,0x00,0x00,0x00,EOT}}, + {0x05, "Keyboard Controller", + {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}}, + {0x06, "CIR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT}, + {0x00,0x00,0x00,0x00,0x08,0x09,0x32,0x00,EOT}}, + {0x07, "GPIO6, GPIO7, GPIO8, GPIO9", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7, + 0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xf4,0xf5, + 0xf6,0xf7,0xf8,EOT}, + {0x03,0xff,0x00,0x00,0x00,0xef,0x00,0x00,0x00, + 0xff,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00, + 0x00,0x00,0x00,EOT}}, + {0x08, "WDT1, GPIO0, GPIO1, GPIOA", + {0x30,0x60,0x61,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0, + 0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT}, + {0x02,0x00,0x00,0xff,0x00,0x00,0x00,0xef,0xff, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x09, "GPIO2, GPIO3, GPIO4, GPIO5", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7, + 0xe8,0xe9,0xea,0xeb,0xee,0xf0,0xf1,0xf2,0xf4, + 0xf5,0xf6,0xf7,0xfe,EOT}, + {0x04,0xdf,0x00,0x00,0x00,0xff,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0xff, + 0x00,0x00,0x00,0x00,EOT}}, + {0x0a, "ACPI", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9, + 0xee,0xf0,0xf2,0xf3,0xf4,0xf6,0xf7,0xfe,EOT}, + {0x01,0x00,0x00,0x00,0x00,0x02,0x1c,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0x00,EOT}}, + {0x0b, "Hardware Monitor, Front Panel LED", + {0x30,0x60,0x61,0x62,0x63,0x70,0xe0,0xe1,0xe2, + 0xf0,0xf1,0xf2,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa, + EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x7f,0x7f,0xff, + 0x00,0x00,0x00,0x10,0x00,0x87,0x47,0x00,0x00, + EOT}}, + {0x0d, "VID", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe9,0xee, + 0xef,0xf0,0xf4,0xf5,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x88, + 0x00,0x00,0x00,0x00,EOT}}, + {0x0e, "CIR WAKE-UP", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0x00,0x00,0x00,EOT}}, + {0x0f, "GPIO Push-Pull or Open-drain", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, + 0xe9,0xf0,0xf1,0xf2,EOT}, + {0xff,0xdf,0xff,0xfe,0xf6,0xff,0xff,0xd3,0xff, + 0x9f,0x00,0x00,0x00,EOT}}, + {0x14, "SVID", + {0xe0,0xe1,0xe3,0xe4,EOT}, + {0x00,0x80,0x00,0x00,EOT}}, + {0x16, "Deep Sleep", + {0x30,0xe0,0xe1,0xe2,EOT}, + {0x20,0x20,0x04,0x05,EOT}}, + {0x17, "GPIOA", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,EOT}, + {0x01,0x00,0x00,0x00,0x01,0x00,EOT}}, + {EOT}}}, + {0xc333, "NCT6776F (C)", { + {NOLDN, NULL, + {0x10,0x11,0x13,0x14,0x16,0x17,0x18,0x19,0x1a, + 0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23, + 0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d, + 0x2e,0x2f,EOT}, + {0xff,0xff,0x00,0x00,0xff,0xff,0xff,0xff,0xf0, + 0x78,0x00,0x00,0xff,0xff,0xc3,0x33,0xff,0x00, + 0x64,0x00,MISC,0x00,0x00,0xc0,0x00,0x81,0x00, + 0x00,MISC,EOT}}, + {0x00, "FDC", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4, + 0xf5,EOT}, + {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00, + 0x00,EOT}}, + {0x01, "Parallel Port", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}}, + {0x02, "UART A", + {0x30,0x60,0x61,0x70,0xf0,0xf2,EOT}, + {0x01,0x03,0xf8,0x04,0x00,0x00,EOT}}, + {0x03, "UART B, IR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT}, + {0x01,0x02,0xf8,0x03,0x00,0x00,0x00,EOT}}, + {0x05, "Keyboard Controller", + {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}}, + {0x06, "CIR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT}, + {0x00,0x00,0x00,0x00,0x08,0x09,0x32,0x00,EOT}}, + {0x07, "GPIO6, GPIO7, GPIO8, GPIO9", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7, + 0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xf4,0xf5, + 0xf6,0xf7,0xf8,EOT}, + {0x03,0xff,0x00,0x00,0x00,0xef,0x00,0x00,0x00, + 0xff,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00, + 0x00,0x00,0x00,EOT}}, + {0x08, "WDT1, GPIO0, GPIO1, GPIOA", + {0x30,0x60,0x61,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0, + 0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT}, + {0x02,0x00,0x00,0xff,0x00,0x00,0x00,0xef,0xff, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x09, "GPIO2, GPIO3, GPIO4, GPIO5", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7, + 0xe8,0xe9,0xea,0xeb,0xee,0xf0,0xf1,0xf2,0xf4, + 0xf5,0xf6,0xf7,0xfe,EOT}, + {0x04,0xdf,0x00,0x00,0x00,0xff,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0xff, + 0x00,0x00,0x00,0x00,EOT}}, + {0x0a, "ACPI", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9, + 0xee,0xf0,0xf2,0xf3,0xf4,0xf6,0xf7,0xfe,EOT}, + {0x01,0x00,0x00,0x00,0x00,0x02,0x1c,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0x00,EOT}}, + {0x0b, "Hardware Monitor, Front Panel LED", + {0x30,0x60,0x61,0x62,0x63,0x70,0xe0,0xe1,0xe2, + 0xf0,0xf1,0xf2,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa, + EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x7f,0x7f,0xff, + 0x00,0x00,0x00,0x10,0x00,0x87,0x47,0x00,0x00, + EOT}}, + {0x0d, "VID", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe9,0xee, + 0xef,0xf0,0xf4,0xf5,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x88, + 0x00,0x00,0x00,0x00,EOT}}, + {0x0e, "CIR WAKE-UP", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0x00,0x00,0x00,EOT}}, + {0x0f, "GPIO Push-Pull or Open-drain", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, + 0xe9,0xf0,0xf1,0xf2,EOT}, + {0xff,0xdf,0xff,0xfe,0xf6,0xff,0xff,0xd3,0xff, + 0x9f,0x00,0x00,0x00,EOT}}, + {0x14, "SVID", + {0xe0,0xe1,0xe3,0xe4,EOT}, + {0x00,0x80,0x00,0x00,EOT}}, + {0x16, "Deep Sleep", + {0x30,0xe0,0xe1,0xe2,EOT}, + {0x20,0x20,0x04,0x05,EOT}}, + {0x17, "GPIOA", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,EOT}, + {0x01,0x00,0x00,0x00,0x01,0x00,EOT}}, + {EOT}}}, {EOT} };
void probe_idregs_nuvoton(uint16_t port) { uint8_t sid, srid; - uint8_t chip_id = 0, chip_rev = 0; + uint16_t chip_id = 0; + uint8_t chip_rev = 0; + + /* Probe for the 16bit IDs first to avoid collisions */ + probing_for("Nuvoton", "", port); + enter_conf_mode_winbond_fintek_ite_8787(port); + chip_id = (regval(port, DEVICE_ID_REG) << 8) | + regval(port, DEVICE_ID_REG + 1); + + exit_conf_mode_winbond_fintek_ite_8787(port); + + if (!superio_unknown(reg_table, chip_id)) { + printf("Found Nuvoton %s (id=0x%02x) at 0x%x\n", + get_superio_name(reg_table, chip_id), chip_id, port); + chip_found = 1; + dump_superio("Nuvoton", reg_table, port, chip_id, LDN_SEL); + return; + } + + if (verbose) + printf(NOTFOUND "chip_id=0x%04x\n", chip_id);
probing_for("Nuvoton", "(sid=0xfc) ", port);
Modified: trunk/util/superiotool/superiotool.h ============================================================================== --- trunk/util/superiotool/superiotool.h Sat Apr 23 01:10:35 2011 (r6542) +++ trunk/util/superiotool/superiotool.h Sat Apr 23 01:12:40 2011 (r6543) @@ -230,7 +230,7 @@ {probe_idregs_nsc, {0x2e, 0x4e, 0x15c, 0x164e, EOT}}, /* I/O pairs on Nuvoton EC chips can be configured by firmware in * addition to the following hardware strapping options. */ - {probe_idregs_nuvoton, {0x164e, 0x2e, EOT}}, + {probe_idregs_nuvoton, {0x164e, 0x2e, 0x4e, EOT}}, {probe_idregs_smsc, {0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}}, {probe_idregs_winbond, {0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}}, #ifdef PCI_SUPPORT
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