Re: [coreboot] Creating PIRQ table

[Gergely Kiss]

I have enabled CSM in the vendor BIOS and booted a "combined" (UEFI+MBR)
live Linux in MBR mode which actually helped to get the PIRQ table. So far
so good. :)

Seems like this board has 9 IRQ slots and a somewhat different PIRQ table
compared to the one your board has.

Thanks a lot for your assistance, I'm going to try building Coreboot with
verbose debugging enabled and flash it to see how well it performs.

Hopefully the on-board serial port will work with the current SIO code.
Looks like the internals of the serial interface are quite similar
(identical?) for all ITE chips so maybe I can make it work without the
datasheet.

Regards,
Gergely

On 29 November 2017 at 16:05, Sergej Ivanov  wrote:
> Hello,
>
> Try to boot linux in legacy mode(enable CSM and set all boot options to
> legacy mode), and run getpir, i've made my table this way. I also recommend
> to enable AGESA debug output to serial port, it can help you with ddr
> training problems.
>
> 29 нояб. 2017 г. 12:40 пользователь "Gergely Kiss" 
> написал:
>
> Hi Sergej,
> > thanks a lot for your feedback, it's much appreciated.
> >
> > As far as I can tell, my board only has 8 IRQ slots while the one you
> > ported has 10. I believe this is (partially) due to the number of PCI-e
> > slots does not match (the Biostar board has one extra PCI-e x16 slot) so
> > there definitely is a difference regardless of sharing the same chipset.
> >
> > Can you please share some information on how you fetched the PIRQ table
> > from the vendor firmware? I have tried the (now deprecated) getpir utility
> > but it could not find a PIRQ table neither in the vendor firmware nor in
> > the memory.
> >
> > Is there some other tool I could use?
> >
> > Thanks,
> > Gergely
> >
> > On 28 November 2017 at 19:59, Sergej Ivanov  wrote:
> > > Hello,
> > >
> > > Almost everyone socket AM1 boards have same PIRQ tables. While porting
> > > Biostar AM1ML i've dumped this table from vendor UEFI (using old method,
> > > that was depricated long time ago). BTW don't forget to remove additional
> > > SIO config code from romstage.
> > >
> > > 28 нояб. 2017 г. 19:16 пользователь "Gergely Kiss" 
> > > написал:
> > > > Hi All,
> > > >
> > > > my name is Gergely Kiss and I'm currently working on porting Coreboot
> > > > to the ASUS AM1I-A board.
> > > >
> > > > I'm a great fan of open source software, I've contributed a few times
> > > > to some well-known projects like Squid, Monodevelop and Openwrt, just to
> > > > name a few.
> > > >
> > > > I would need a little bit of help from the devs about how to create the
> > > > PCI IRQ routing table for my board (the easiest way possible).
> > > >
> > > > I'm using the Biostar AM1ML board as a template as it looks to be a
> > > > very similar board as the one I have. The only differences I can see is the
> > > > SuperIO (ITE 8623E) & the audio chip (Realtek ALC887-VD) and also some
> > > > minor things with the board layout so I'm not expecting to have too much
> > > > difficulties.
> > > >
> > > > Looking at the file https://review.coreboot.org/cg
> > > > it/coreboot.git/tree/src/mainboard/biostar/am1ml/irq_tables.c, the
> > > > following questions came to my mind:
> > > > Do I really have to follow the "long way" as outlined in the Wiki
> > > >
> > > > page at https://www.coreboot.org/Creating_Valid_IRQ_Tables? Couldn't I
> > > > just fetch the routing table from the OEM BIOS somehow and implement it in
> > > > the source?
> > > > What's the meaning of the fields "link" & "bitmap"? Are these common
> > > >
> > > > for all boards with the same chipset? Where should I look up this
> > > > information?
> > > > I believe I have to create as many entries within the struct as many
> > > >
> > > > IRQ slots exist for the board. Am I right?
> > > >
> > > > I found a table in the board's manual (attached) which looks useful but
> > > > I'm afraid it might not contain all the information I need to construct a
> > > > valid routing table.
> > > >
> > > > As for the SuperIO chip, I think I won't have too much issues getting
> > > > it to work as it looks like ITE SIO chips are quite similar from the
> > > > developer's perspective but I still miss having a datasheet available. I'll
> > > > try to reach out to the vendor to see if they are willing to share a
> > > > datasheet with me.
> > > >
> > > > Any help from you guys is much appreciated.
> > > >
> > > > Thanks & Regards,
> > > > Gergely