Hello,
I have been trying to use Coreboot (with SeaBIOS as payload) on a VIA EPIA-M mainboard, but had some problems with it. I have built everything with the toolchain that comes with Coreboot.
To make everything (Coreboot + VGA BIOS + SeaBIOS) fit in the 256 KB flash memory, I had to LZMA compress both Coreboot and SeaBIOS. Unfortunately LZMA compression did not work for either Coreboot, nor for the payload.
When compressing Coreboot's ramstage with LZMA, on boot it fails with the following error message when trying to decompress it:
Trying CBFS ramstage loader. CBFS: loading stage fallback/ramstage @ 0x100000 (151600 bytes), entry @ 0x100000 CBFS: tried to decompress 43540 bytes with algorithm #1,but that algorithm id is unsupported. Ramstage was not loaded!
The next thing I tried was to omit the VGA BIOS, so I could fit Coreboot and SeaBIOS uncompressed in the flash memory. With that configuration Coreboot was able to finish successfully and then load SeaBIOS. Unfortunately, SeaBIOS did not do much besides printing two lines of text:
SeaBIOS (version rel-1.7.5-42-g275672e-20140817_233743-themachine) 0
After that, it would reboot the machine and it would do the same thing over and over again. It made no difference when I increased the debug output level of SeaBIOS.
Next I tried to figure out why LZMA compression did not work. LZMA compression is compiled when CBFS_CORE_WITH_LZMA is defined. I figured out that it gets defined at the beginning of src/lib/cbfs.c, depending on a few conditions. Even though I had enabled LZMA compression through the configuration menu, the constant did not get defined, though. So what I then tried was to define it unconditionally in that cbfs.c file. I did not investigate further which condition prevented it from being defined in the first place, but that change allowed me to build a Coreboot ROM where the romstage LZMA decompression worked fine. LZMA decompression of the payload still did not work, though. It failed with an error message:
CBFS: located payload @ fffed238, 48776 bytes. Loading segment from rom address 0xfffed238 code (compression=1) New segment dstaddr 0xe9880 memsize 0x16780 srcaddr 0xfffed270 filesize 0xbe50 (cleaned up) New segment addr 0xe9880 size 0x16780 offset 0xfffed270 filesize 0xbe50 Loading segment from rom address 0xfffed254 Entry Point 0x000fd1e9 Bounce Buffer at 0df95000, 303200 bytes Loading Segment: addr: 0x00000000000e9880 memsz: 0x0000000000016780 filesz: 0x000000000000be50 lb: [0x0000000000100000, 0x0000000000125030) Post relocation: addr: 0x00000000000e9880 memsz: 0x0000000000016780 filesz: 0x000000000000be50 using LZMA lzma: Decoding error = 1 Could not load payload
Using a compressed Coreboot and uncompressed SeaBIOS did not change SeaBIOS' behavior. It still prints only its version string and a 0 on the next line.
I tried both the default configuration of SeaBIOS and with a more stripped down configuration (leaving out unused stuff like XHCI and OHCI, no splash screen etc. to reduce its size). None of the changes I tried made a difference in SeaBIOS' behavior.
Any help or hints on what I might be missing are very appreciated. If you need any more information, please let me know. I did not attach any config files/log files yet, because I tried so many different things.
Thanks xchip
Dear xchip,
welcome again to coreboot and thank you for following the advice in IRC channel and contacting the mailing list!
Am Samstag, den 23.08.2014, 11:41 +0200 schrieb xchip@hush.ai:
I have been trying to use Coreboot (with SeaBIOS as payload) on a VIA EPIA-M mainboard, but had some problems with it. I have built everything with the toolchain that comes with Coreboot.
[…]
I tried both the default configuration of SeaBIOS and with a more stripped down configuration (leaving out unused stuff like XHCI and OHCI, no splash screen etc. to reduce its size). None of the changes I tried made a difference in SeaBIOS' behavior.
could you please check that SeaBIOS’ log level is set to 8 and attach the .config from it? But probably non-working LZMA decompression is an indicator for an incorrect set up already. But we’ll see and maybe somebody else has an idea.
[…]
Thanks,
Paul
PS: If you can, it’d be great if you could just send plain text messages to mailing lists.
PPS: coreboot is officially spelled all lowercase.
Hi again,
could you please check that SeaBIOS’ log level is set to 8 and attach the .config from it? But probably non-working LZMA decompression is an indicator for an incorrect set up already. But we’ll see and maybe somebody else has an idea.
I have attached my SeaBIOS .config file. Log level was set to 9.
PS: If you can, it’d be great if you could just send plain text messages to mailing lists.
Sorry for not sending plaintext. That wasn't my intention. I'm using a web interface right now, which has done that without me noticing. I've tried to disable any formatting now. Hope that helps.
xchip
Dear xchip,
Am Sonntag, den 24.08.2014, 00:53 +0200 schrieb xchip@hush.ai:
could you please check that SeaBIOS’ log level is set to 8 and attach the .config from it? But probably non-working LZMA decompression is an indicator for an incorrect set up already. But we’ll see and maybe somebody else has an idea.
I have attached my SeaBIOS .config file. Log level was set to 9.
looking at my log files, the next line should be something like.
[…] Found coreboot cbmem console @ c7fc0400 Found mainboard ASROCK E350M1 malloc preinit […]
As you probably do not have CBMEM console enabled in coreboot, please disable it also in SeaBIOS by unselecting the Kconfig option `DEBUG_COREBOOT`. (You can search in `make menuconfig` by pressing the key / and then entering some part of the option name.)
By the way, for now you can also disable a lot of the USB stuff in SeaBIOS to save space, if that is still an issue.
Thanks,
Paul
Dear xchip,
Am Sonntag, den 24.08.2014, 10:25 +0200 schrieb Paul Menzel:
Am Sonntag, den 24.08.2014, 00:53 +0200 schrieb xchip@hush.ai:
could you please check that SeaBIOS’ log level is set to 8 and attach the .config from it? But probably non-working LZMA decompression is an indicator for an incorrect set up already. But we’ll see and maybe somebody else has an idea.
I have attached my SeaBIOS .config file. Log level was set to 9.
looking at my log files, the next line should be something like.
[…] Found coreboot cbmem console @ c7fc0400 Found mainboard ASROCK E350M1 malloc preinit […]
I am sorry, that was from the CBMEM console. The serial console log should contain the messages below.
SeaBIOS (version rel-1.7.5-42-g275672e-20140816_084721-asrock-e350m1) Attempting to find coreboot table Found coreboot table forwarder. Now attempting to find coreboot memory map SeaBIOS (version rel-1.7.5-42-g275672e-20140816_084721-asrock-e350m1) Found coreboot cbmem console @ c7fc0400 Found mainboard ASROCK E350M1 malloc preinit […]
Adding more print statements should get you further to find out if `coreboot_preinit()` is even reached.
As you probably do not have CBMEM console enabled in coreboot, please disable it also in SeaBIOS by unselecting the Kconfig option `DEBUG_COREBOOT`. (You can search in `make menuconfig` by pressing the key / and then entering some part of the option name.)
By the way, for now you can also disable a lot of the USB stuff in SeaBIOS to save space, if that is still an issue.
Thanks,
Paul
Hi,
when I'm having trouble with lzma what I do is not build a payload, and run the ramstage uncompressed, and at least make sure that works.
I think this is your real problem, as you say.
Trying CBFS ramstage loader. CBFS: loading stage fallback/ramstage @ 0x100000 (151600 bytes), entry @ 0x100000 CBFS: tried to decompress 43540 bytes with algorithm #1,but that algorithm id is unsupported. Ramstage was not loaded!
This is really weird. But I don't think you should go one step further until you see why this is happening, because it points to other bigger problems.
BTW, when you omitted the vga bios, did you rebuild seabios to not expect vga to be present?
I don't think the issue is the lzma compression does not work. Somehow the config step is broken, and if that variable is not set right, others may not be set right either. The integrity of your build is questionable.
When's the last time we had a success with EPIA-M? I just don't recall, anyone know?
ron