r3276 - trunk/coreboot-v2/src/southbridge/intel/i3100

Author: eswierk
Date: 2008-04-30 20:29:35 +0200 (Wed, 30 Apr 2008)
New Revision: 3276

Modified:
   trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_early_lpc.c
Log:
By default, the Intel 3100 LPC interface enables only I/O range 0x3f8
for both serial ports, making it challenging to use COM2 for the early
console.

Enable the traditional I/O ranges 0x3f8 for COM1 and 0x2f8 for COM2.

Signed-off-by: Ed Swierk 
Acked-by: Joseph Smith

Modified: trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_early_lpc.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_early_lpc.c	2008-04-29 13:46:38 UTC (rev 3275)
+++ trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_early_lpc.c	2008-04-30 18:29:35 UTC (rev 3276)
@@ -23,6 +23,7 @@
    device_t dev = PCI_DEV(0x0, 0x1f, 0x0);

/* Enable decoding of I/O locations for SuperIO devices */
+	pci_write_config16(dev, 0x80, 0x0010);
    pci_write_config16(dev, 0x82, 0x340f);
 }