Patch set updated for coreboot: 9716e82 Fix ldscript for bootblock .rom section

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/453

-gerrit

commit 9716e822a4a7442dcb781aa9b2fda2a35b1d531f
Author: Kyösti Mälkki 
Date:   Wed Nov 23 16:33:12 2011 +0200

Fix ldscript for bootblock .rom section

Allocation size for the section was miscalculated, so the section
    did not honour its upper-bound address.

Also align the section start to 4 bytes, so it starts with code
    instead of pad bytes.

Change-Id: Ic2a43981836a0873b50abecfcad2def7b6586a5d
    Signed-off-by: Kyösti Mälkki 
---
 src/arch/x86/init/ldscript_failover.lb |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletions(-)

diff --git a/src/arch/x86/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.lb
index 7e48dc1..83e5eb3 100644
--- a/src/arch/x86/init/ldscript_failover.lb
+++ b/src/arch/x86/init/ldscript_failover.lb
@@ -29,6 +29,14 @@ MEMORY {
 TARGET(binary)
 SECTIONS
 {
+	/* Align .rom to next 4 byte boundary so no pad byte appears
+	 * between _rom and _start.
+	 */
+	.bogus ROMLOC_MIN : {
+		. = ALIGN(4);
+		ROMLOC = .;
+	} >rom = 0xff
+
    /* This section might be better named .setup */
    .rom ROMLOC : {
    	_rom = .;
@@ -39,7 +47,11 @@ SECTIONS
    	_erom = .;
    } >rom = 0xff

-	ROMLOC = 0xffffff00 - (_erom - _rom) + 1;
+	/* Allocation reserves extra 16 bytes here. Alignment requirements
+	 * may cause the total size of a section to change when the start
+	 * address gets applied.
+	 */
+	ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16);

/DISCARD/ : {
    	*(.comment)