---------- Forwarded message ---------- From: Darmawan Salihun darmawan.salihun@gmail.com Date: May 31, 2007 11:21 PM Subject: Re: [LinuxBIOS] Question about protect mode? To: Juergen Beisert juergen127@kreuzholzen.de
Hi Libo,
On 5/31/07, Juergen Beisert juergen127@kreuzholzen.de wrote:
Hi,
On Thursday 31 May 2007 11:00, Yuning Feng wrote:
To Xia-yin: Processor manual does help. Of course, explanation from people here is more specific.
2007/5/30, Feng, Libo < Libo.Feng@amd.com>:
Another question is BIOS ROM can attach to XBUS, LPC, someone told me, even PCI, how dose the address forward to the location?
To Libo and Juergen: It seems not every board can do that. Would you name some of them ?
Hmm, every board *must" do it. The CPU outputs the address 0xFFFFFFF0 and awaits to read its first instruction. The external chipset (if not a SoC) is responsible to generate a chip select signal to a device that contains this instruction(s) and to forward the "answer" from this device back to the CPU data bus. So every board can do it, but maybe not all variants listed above. Maybe only one of it, or maybe more than one of it. In the latter case you
must select in a _chipset_specific_way_ where the device is connected that contains the boot code. So you should not read processor's manual, you should read chipset's manual instead (for the case they are separate devices. On SoCs they are combined in one silicon).
If you don't know how the chipset can decode the memory access from the processor while in real mode, you should read the "memory mapping" part of the chipset datasheet. In x86 platform, address range between 0xF_0000-0xF_FFFF ( segment 0xF000 -- real mode 16-bit) is aliased to address range just below 4Gb, i.e. 0xFFFF_0000 - 0xFFFF_FFFF. Therefore, while in real mode, the processor can still access the contents of 0xFFFF_FFF0 address by accessing address 0xF_FFF0 because both of them are the same (i.e. aliased). Read the description about PAM (Programmable Attribute Memory? -- i forgot the exact "long name" of the abbreviation) registers in Intel chipset datasheets. You should understand the concept with it, sooner or later ;-)