[commit] r5739 - in trunk/src: mainboard/pcengines mainboard/pcengines/alix2d3 northbridge/amd/lx
Author: oxygene Date: Tue Aug 24 14:58:17 2010 New Revision: 5739 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5739
Log: * Adds support for PC Engines Alix.2D(1)3 board to Coreboot. * DRAM initialization done message is now printed in debug-mode only, rather than everytime.
Signed-off-by: Aurelien Guillaume aurelien@iwi.me Acked-by: Patrick Georgi patrick.georgi@coresystems.de
Added: trunk/src/mainboard/pcengines/alix2d3/ - copied from r5737, trunk/src/mainboard/pcengines/alix1c/ Modified: trunk/src/mainboard/pcengines/Kconfig trunk/src/mainboard/pcengines/alix2d3/Kconfig trunk/src/mainboard/pcengines/alix2d3/devicetree.cb trunk/src/mainboard/pcengines/alix2d3/irq_tables.c trunk/src/mainboard/pcengines/alix2d3/mainboard.c trunk/src/mainboard/pcengines/alix2d3/romstage.c trunk/src/northbridge/amd/lx/raminit.c
Modified: trunk/src/mainboard/pcengines/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/Kconfig Mon Aug 23 20:43:27 2010 (r5738) +++ trunk/src/mainboard/pcengines/Kconfig Tue Aug 24 14:58:17 2010 (r5739) @@ -3,6 +3,7 @@ depends on VENDOR_PC_ENGINES
source "src/mainboard/pcengines/alix1c/Kconfig" +source "src/mainboard/pcengines/alix2d3/Kconfig"
endchoice
Modified: trunk/src/mainboard/pcengines/alix2d3/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/Kconfig Sun Aug 22 22:02:27 2010 (r5737) +++ trunk/src/mainboard/pcengines/alix2d3/Kconfig Tue Aug 24 14:58:17 2010 (r5739) @@ -1,10 +1,9 @@ -config BOARD_PCENGINES_ALIX1C - bool "ALIX.1C" +config BOARD_PCENGINES_ALIX2D3 + bool "ALIX.2D3" select ARCH_X86 select CPU_AMD_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 - select SUPERIO_WINBOND_W83627HF select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC @@ -13,20 +12,20 @@
config MAINBOARD_DIR string - default pcengines/alix1c - depends on BOARD_PCENGINES_ALIX1C + default pcengines/alix2d3 + depends on BOARD_PCENGINES_ALIX2D3
config MAINBOARD_PART_NUMBER string - default "ALIX.1C" - depends on BOARD_PCENGINES_ALIX1C + default "ALIX.2D3" + depends on BOARD_PCENGINES_ALIX2D3
config IRQ_SLOT_COUNT int - default 5 - depends on BOARD_PCENGINES_ALIX1C + default 6 + depends on BOARD_PCENGINES_ALIX2D3
config RAMBASE hex default 0x4000 - depends on BOARD_PCENGINES_ALIX1C + depends on BOARD_PCENGINES_ALIX2D3
Modified: trunk/src/mainboard/pcengines/alix2d3/devicetree.cb ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/devicetree.cb Sun Aug 22 22:02:27 2010 (r5737) +++ trunk/src/mainboard/pcengines/alix2d3/devicetree.cb Tue Aug 24 14:58:17 2010 (r5739) @@ -8,9 +8,9 @@ # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK # How to get these? Boot linux and do this: # rdmsr 0x51400025 - register "lpc_serirq_enable" = "0x0000105a" + register "lpc_serirq_enable" = "0x00001002" # rdmsr 0x5140004e -- polairy is high 16 bits of low 32 bits - register "lpc_serirq_polarity" = "0x0000EFA5" + register "lpc_serirq_polarity" = "0x0000EFFD" # mode is high 10 bits (determined from code) register "lpc_serirq_mode" = "1" # Don't yet know how to find this. @@ -18,59 +18,19 @@ register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash register "enable_USBP4_device" = "0" #0: host, 1:device register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381) - register "com1_enable" = "0" + register "com1_enable" = "1" register "com1_address" = "0x3F8" register "com1_irq" = "4" - register "com2_enable" = "0" + register "com2_enable" = "1" # Wired on Alix.2D13 only register "com2_address" = "0x2F8" register "com2_irq" = "3" - register "unwanted_vpci[0]" = "0" # End of list has a zero - device pci f.0 on # ISA Bridge - chip superio/winbond/w83627hf - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 on # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.2 on # Com1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # Com2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.5 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 12 - end - device pnp 2e.6 off # CIR - io 0x60 = 0x100 - end - device pnp 2e.7 off # GAME_MIDI_GIPO1 - io 0x60 = 0x220 - io 0x62 = 0x300 - irq 0x70 = 9 - end - device pnp 2e.8 on end # GPIO2 - device pnp 2e.9 on end # GPIO3 - device pnp 2e.a on end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - irq 0x70 = 5 - end - end - end + register "unwanted_vpci[0]" = "0x80000900" # Disable VGA controller (not wired) + register "unwanted_vpci[1]" = "0x80007B00" # Disable AC97 controller (not wired) + register "unwanted_vpci[2]" = "0" # End of list has a zero + device pci f.0 on end # ISA Bridge device pci f.1 on end # Flash controller device pci f.2 on end # IDE controller - device pci f.3 on end # Audio - device pci f.4 on end # OHCI + device pci f.4 on end # OHCI device pci f.5 on end # EHCI end end
Modified: trunk/src/mainboard/pcengines/alix2d3/irq_tables.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/irq_tables.c Sun Aug 22 22:02:27 2010 (r5737) +++ trunk/src/mainboard/pcengines/alix2d3/irq_tables.c Tue Aug 24 14:58:17 2010 (r5739) @@ -41,33 +41,34 @@ #define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */
/* - * ALIX1.C interrupt wiring. + * ALIX.2D3 interrupt wiring. * * Devices are: - * - * 00:01.0 Host bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge (rev 31) - * 00:01.2 Entertainment encryption device: Advanced Micro Devices [AMD] Geode LX AES Security Block - * 00:0d.0 Ethernet controller: VIA Technologies, Inc. VT6105M [Rhine-III] (rev 96) - * 00:0e.0 Network controller: Intersil Corporation Prism 2.5 Wavelan chipset (rev 01) - * 00:0f.0 ISA bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA (rev 03) - * 00:0f.2 IDE interface: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE (rev 01) - * 00:0f.3 Multimedia audio controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] Audio (rev 01) - * 00:0f.4 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC (rev 02) - * 00:0f.5 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC (rev 02) - * - * The only devices that interrupt are: + * 00:01.0 Host bridge [0600]: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge [1022:2080] (rev 33) + * 00:01.2 Entertainment encryption device [1010]: Advanced Micro Devices [AMD] Geode LX AES Security Block [1022:2082] + * 00:09.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) + * 00:0a.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) + * 00:0b.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) + * 00:0f.0 ISA bridge [0601]: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA [1022:2090] (rev 03) + * 00:0f.2 IDE interface [0101]: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE [1022:209a] (rev 01) + * 00:0f.4 USB Controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC [1022:2094] (rev 02) + * 00:0f.5 USB Controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC [1022:2095] (rev 02) + + * The only devices that interrupt are: * * What Device IRQ PIN PIN WIRED TO * ------------------------------------------------- * AES 00:01.2 0a 01 A A - * 3VPCI 00:0c.0 0a 01 A A - * eth0 00:0d.0 0b 01 A B - * mpci 00:0e.0 0a 01 A A - * usb 00:0f.3 0b 02 B B + * eth0 00:09.0 0b 01 A B + * eth1 00:0a.0 0b 01 A C + * eth2 00:0b.0 0b 01 A D + * mpci 00:0c.0 0a 01 A A + * mpci 00:0c.0 0b 02 B B * usb 00:0f.4 0b 04 D D * usb 00:0f.5 0b 04 D D * - * The only swizzled interrupt is eth0, where INTA is wired to interrupt controller line B. + * The only swizzled interrupts are the ethernet controllers, where INTA is wired to + * interrupt controller lines B, C and D. */
const struct irq_routing_table intel_irq_routing_table = { @@ -90,14 +91,17 @@ /* CPU */ {0x00, (0x01 << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0},
- /* PCI (slot 1) */ - {0x00, (0x0C << 3) | 0x0, {{L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}}, 0x4, 0x0}, + /* On-board ethernet (Left) */ + {0x00, (0x09 << 3) | 0x0, {{L_PIRQB, M_PIRQB}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, + + /* On-board ethernet (Middle) */ + {0x00, (0x0A << 3) | 0x0, {{L_PIRQC, M_PIRQC}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0},
- /* On-board ethernet */ - {0x00, (0x0D << 3) | 0x0, {{L_PIRQB, M_PIRQB}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, + /* On-board ethernet (Right) */ + {0x00, (0x0B << 3) | 0x0, {{L_PIRQD, M_PIRQD}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0},
- /* Mini PCI (slot 2) */ - {0x00, (0x0E << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x1, 0x0}, + /* Mini PCI (slot 1) */ + {0x00, (0x0C << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0},
/* Chipset slots -- f.3 wires to B, and f.4 and f.5 wires to D. */ {0x00, (0x0F << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0},
Modified: trunk/src/mainboard/pcengines/alix2d3/mainboard.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/mainboard.c Sun Aug 22 22:02:27 2010 (r5737) +++ trunk/src/mainboard/pcengines/alix2d3/mainboard.c Tue Aug 24 14:58:17 2010 (r5739) @@ -23,8 +23,8 @@
static void init(struct device *dev) { - printk(BIOS_DEBUG, "ALIX1.C ENTER %s\n", __func__); - printk(BIOS_DEBUG, "ALIX1.C EXIT %s\n", __func__); + printk(BIOS_DEBUG, "ALIX.2D3 ENTER %s\n", __func__); + printk(BIOS_DEBUG, "ALIX.2D3 EXIT %s\n", __func__); }
static void enable_dev(struct device *dev) @@ -33,7 +33,7 @@ }
struct chip_operations mainboard_ops = { - CHIP_NAME("PC Engines ALIX1.C Mainboard") + CHIP_NAME("PC Engines ALIX.2D3 Mainboard") .enable_dev = enable_dev, };
Modified: trunk/src/mainboard/pcengines/alix2d3/romstage.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/romstage.c Sun Aug 22 22:02:27 2010 (r5737) +++ trunk/src/mainboard/pcengines/alix2d3/romstage.c Tue Aug 24 14:58:17 2010 (r5739) @@ -35,13 +35,12 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-/* The ALIX1.C has no SMBus; the setup is hard-wired. */ +/* The ALIX.2D3 has no SMBus; the setup is hard-wired. */ static void cs5536_enable_smbus(void) { }
#include "southbridge/amd/cs5536/cs5536_early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
/* The part is a Hynix hy5du121622ctp-d43. * @@ -120,6 +119,34 @@ /** Early mainboard specific GPIO setup. */ static void mb_gpio_init(void) { + /* + * Disable power button, since it is hardwired to ground on this board, + * and the power would be cut off atfer a 4-second delay otherwise. + */ + outl(0x00020000, PMS_IO_BASE + 0x40); + + /* + * Enable LEDs GPIO outputs to light up the leds + * This is how the original tinyBIOS sets them after boot. + * Info: GPIO_IO_BASE, 0x6100, is only valid before PCI init, so it + * may be used here, but not after PCI Init. + * Note: Prior to a certain release, Linux used a hardwired 0x6100 in the + * leds-alix2.c driver. Coreboot dynamically assigns this space, + * so the driver does not work anymore. + * Good workaround: use the newer driver + * Ugly workaround: $ wrmsr 0x5140000C 0xf00100006100 + * This resets the GPIO I/O space to 0x6100. + * This may break other things, though. + */ + outl(1 << 6, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE); + outl(1 << 9, GPIO_IO_BASE + GPIOH_OUTPUT_ENABLE); + outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_ENABLE); + + /* outl(1 << 6, GPIO_IO_BASE + GPIOL_OUTPUT_VALUE); */ /* Led 1 enabled */ + outl(1 << 9, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 2 disabled */ + outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */ + + }
void main(unsigned long bist) @@ -138,8 +165,7 @@ /* NOTE: Must do this AFTER cs5536_early_setup()! * It is counting on some early MSR setup for the CS5536. */ - cs5536_disable_internal_uart(); - w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + cs5536_setup_onchipuart(1); mb_gpio_init(); uart_init(); console_init();
Modified: trunk/src/northbridge/amd/lx/raminit.c ============================================================================== --- trunk/src/northbridge/amd/lx/raminit.c Mon Aug 23 20:43:27 2010 (r5738) +++ trunk/src/northbridge/amd/lx/raminit.c Tue Aug 24 14:58:17 2010 (r5739) @@ -739,7 +739,7 @@ msr.lo |= (209 << 8); /* bits[15:8] = 209 */ wrmsr(msrnum, msr);
- print_emerg("DRAM controller init done.\n"); + banner("DRAM controller init done.\n"); post_code(POST_MEM_SETUP_GOOD); //0x7E
/* make sure there is nothing stale in the cache */
-
repository service