DESCRIPTION: ---------------------------------------------- ## lnxi-patch-14 ##
src/mainboard/arima/hdama/mptable.c Removed: max_apicid() renamed it to max_lapicid() and moved it into generic code /cpu/x86/lapic/lapic.c (See next) src/cpu/x86/lapic/lapic.c Added: generic max_lapicid() to replace get_apicid_base()
src/mainboard/.../mptable.c Replaced: get_apicid_base() with max_lapicid() tyan/s2850/mptable.c tyan/s2881/mptable.c tyan/s2882/mptable.c tyan/s2891/mptable.c tyan/s4880/mptable.c tyan/s2892/mptable.c tyan/s2875/mptable.c tyan/s4882/mptable.c tyan/s2885/mptable.c tyan/s2895/mptable.c
DIFFSTAT: ---------------------------------------------- ../cpu/x86/lapic/lapic.c | 24 +++++ arima/hdama/mptable.c | 198 ++++++++++++++++++++++++++++++++++++----------- tyan/s2850/mptable.c | 6 - tyan/s2875/mptable.c | 6 - tyan/s2881/mptable.c | 6 - tyan/s2882/mptable.c | 6 - tyan/s2885/mptable.c | 7 - tyan/s2891/mptable.c | 6 - tyan/s2892/mptable.c | 6 - tyan/s2895/mptable.c | 6 - tyan/s4880/mptable.c | 6 - tyan/s4882/mptable.c | 2 12 files changed, 187 insertions(+), 92 deletions(-)
PATCH: ----------------------------------------------
Index: tyan/s2850/mptable.c =================================================================== --- tyan/s2850/mptable.c (revision 1105) +++ tyan/s2850/mptable.c (working copy) @@ -107,11 +107,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(1); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0;
smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); Index: tyan/s2875/mptable.c =================================================================== --- tyan/s2875/mptable.c (revision 1105) +++ tyan/s2875/mptable.c (working copy) @@ -123,11 +123,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(1); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0; smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
Index: tyan/s2881/mptable.c =================================================================== --- tyan/s2881/mptable.c (revision 1105) +++ tyan/s2881/mptable.c (working copy) @@ -136,11 +136,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2882/mptable.c =================================================================== --- tyan/s2882/mptable.c (revision 1105) +++ tyan/s2882/mptable.c (working copy) @@ -134,11 +134,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2885/mptable.c =================================================================== --- tyan/s2885/mptable.c (revision 1105) +++ tyan/s2885/mptable.c (working copy) @@ -158,14 +158,11 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; + smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111 { device_t dev; Index: tyan/s2891/mptable.c =================================================================== --- tyan/s2891/mptable.c (revision 1105) +++ tyan/s2891/mptable.c (working copy) @@ -204,11 +204,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2892/mptable.c =================================================================== --- tyan/s2892/mptable.c (revision 1105) +++ tyan/s2892/mptable.c (working copy) @@ -204,11 +204,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2895/mptable.c =================================================================== --- tyan/s2895/mptable.c (revision 1105) +++ tyan/s2895/mptable.c (working copy) @@ -284,11 +284,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(4); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s4880/mptable.c =================================================================== --- tyan/s4880/mptable.c (revision 1105) +++ tyan/s4880/mptable.c (working copy) @@ -135,11 +135,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = max_lapicid() + 1; apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s4882/mptable.c =================================================================== --- tyan/s4882/mptable.c (revision 1105) +++ tyan/s4882/mptable.c (working copy) @@ -94,7 +94,7 @@ /*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); + apicid_base = max_lapicid() + 1; #else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; #endif Index: ../cpu/x86/lapic/lapic.c =================================================================== --- ../cpu/x86/lapic/lapic.c (revision 1105) +++ ../cpu/x86/lapic/lapic.c (working copy) @@ -3,6 +3,8 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h>
+#include <arch/cpu.h> + void setup_lapic(void) { /* this is so interrupts work. This is very limited scope -- @@ -70,3 +72,25 @@ printk_info("done.\n"); post_code(0x9b); } + +unsigned max_lapicid(void) +{ + /* Walk through the device tree and find the + maximum local apic id. + We use this when assigning apic ids to the + IOAPICs. + */ + + unsigned max_lapicid; + device_t dev; + max_lapicid = 0; + for(dev = all_devices; dev; dev = dev->next) { + if (dev->path.type != DEVICE_PATH_APIC) + continue; + if (dev->path.u.apic.apic_id > max_lapicid) { + max_lapicid = dev->path.u.apic.apic_id; + } + } + return max_lapicid; +} + Index: arima/hdama/mptable.c =================================================================== --- arima/hdama/mptable.c (revision 1105) +++ arima/hdama/mptable.c (working copy) @@ -3,7 +3,61 @@ #include <device/pci.h> #include <string.h> #include <stdint.h> +#include <cpu/x86/lapic.h> +#include <arch/cpu.h> +#include <arch/io.h>
+#define HT_INIT_CONTROL 0x6c +#define HTIC_BIOSR_Detect (1<<5) + +/* If we assume a symmetric processor configuration we can + * get all of the information we need to write the processor + * entry from the bootstrap processor. + * Plus I don't think linux really even cares. + * Having the proper apicid's in the table so the non-bootstrap + * processors can be woken up should be enough. + */ +void smp_write_processors_inorder(struct mp_config_table *mc) +{ + int boot_apic_id; + int order_id; + unsigned apic_version; + unsigned cpu_features; + unsigned cpu_feature_flags; + struct cpuid_result result; + device_t cpu; + + boot_apic_id = lapicid(); + apic_version = lapic_read(LAPIC_LVR) & 0xff; + result = cpuid(1); + cpu_features = result.eax; + cpu_feature_flags = result.edx; + /* order the output of the cpus to fix a bug in kernel 6 11 */ + for(order_id = 0;order_id <256; order_id++) { + for(cpu = all_devices; cpu; cpu = cpu->next) { + unsigned long cpu_flag; + if ((cpu->path.type != DEVICE_PATH_APIC) || + (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) + { + continue; + } + if (!cpu->enabled) { + continue; + } + cpu_flag = MPC_CPU_ENABLED; + if (boot_apic_id == cpu->path.u.apic.apic_id) { + cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR; + } + if(cpu->path.u.apic.apic_id == order_id) { + smp_write_processor(mc, + cpu->path.u.apic.apic_id, apic_version, + cpu_flag, cpu_features, cpu_feature_flags); + break; + } + } + } +} + static unsigned node_link_to_bus(unsigned node, unsigned link) { device_t dev; @@ -50,6 +104,10 @@ unsigned char bus_8131_1; unsigned char bus_8131_2; unsigned char bus_8111_1; + unsigned apicid_base; + unsigned apicid_8111; + unsigned apicid_8131_1; + unsigned apicid_8131_2;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); memset(mc, 0, sizeof(*mc)); @@ -68,8 +126,12 @@ mc->mpe_checksum = 0; mc->reserved = 0;
- smp_write_processors(mc); + smp_write_processors_inorder(mc);
+ apicid_base = max_lapicid() + 1; + apicid_8111 = apicid_base; + apicid_8131_1 = apicid_base + 1; + apicid_8131_2 = apicid_base + 2; { device_t dev;
@@ -124,7 +186,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/* IOAPIC handling */ - smp_write_ioapic(mc, 2, 0x11, 0xfec00000); + smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); { device_t dev; struct resource *res; @@ -133,7 +195,7 @@ if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, 0x03, 0x11, res->base); + smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base); } } /* 8131 apic 4 */ @@ -141,44 +203,44 @@ if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, 0x04, 0x11, res->base); + smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base); } } }
/* ISA backward compatibility interrupts */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, 0x02, 0x00); + bus_isa, 0x00, apicid_8111, 0x00); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x01, 0x02, 0x01); + bus_isa, 0x01, apicid_8111, 0x01); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, 0x02, 0x02); + bus_isa, 0x00, apicid_8111, 0x02); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x03, 0x02, 0x03); + bus_isa, 0x03, apicid_8111, 0x03); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x04, 0x02, 0x04); + bus_isa, 0x04, apicid_8111, 0x04); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x05, 0x02, 0x05); + bus_isa, 0x05, apicid_8111, 0x05); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x06, 0x02, 0x06); + bus_isa, 0x06, apicid_8111, 0x06); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x07, 0x02, 0x07); + bus_isa, 0x07, apicid_8111, 0x07); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x08, 0x02, 0x08); + bus_isa, 0x08, apicid_8111, 0x08); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x09, 0x02, 0x09); + bus_isa, 0x09, apicid_8111, 0x09); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0a, 0x02, 0x0a); + bus_isa, 0x0a, apicid_8111, 0x0a); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0b, 0x02, 0x0b); + bus_isa, 0x0b, apicid_8111, 0x0b); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0c, 0x02, 0x0c); + bus_isa, 0x0c, apicid_8111, 0x0c); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0d, 0x02, 0x0d); + bus_isa, 0x0d, apicid_8111, 0x0d); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0e, 0x02, 0x0e); + bus_isa, 0x0e, apicid_8111, 0x0e); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x0f, 0x02, 0x0f); + bus_isa, 0x0f, apicid_8111, 0x0f);
/* Standard local interrupt assignments */ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, @@ -188,46 +250,48 @@
/* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */ /* On board nics */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, apicid_8111, 0x13); + /* On board SATA */ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x05<<2)|0, apicid_8111, 0x11);
/* PCI Slot 1 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, apicid_8111, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, apicid_8111, 0x10);
/* PCI Slot 2 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, apicid_8111, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, apicid_8111, 0x11);
/* PCI Slot 3 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, apicid_8111, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, apicid_8111, 0x10);
/* PCI Slot 4 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, apicid_8111, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, apicid_8111, 0x11);
/* PCI Slot 5 */ #warning "FIXME get the irqs right, it's just hacked to work for now" - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, apicid_8111, 0x10);
/* PCI Slot 6 */ #warning "FIXME get the irqs right, it's just hacked to work for now" - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, apicid_8111, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, apicid_8111, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, apicid_8111, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, apicid_8111, 0x13);
/* There is no extension information... */
@@ -239,9 +303,51 @@ return smp_next_mpe_entry(mc); }
+void reboot_if_hotswap(void) +{ + /* Hack patch work around for hot swap enable 33mhz problem */ + device_t dev; + uint32_t data; + unsigned long htic; + int reset; + int i; + + reset = 0; + printk_debug("Looking for bad PCIX MHz input\n"); + dev = dev_find_slot(1, PCI_DEVFN(0x02,0)); + data = pci_read_config32(dev, 0xa0); + if(!(((data>>16)&0x03)==0x03)) { + reset=1; + printk_debug("Bad PCIX MHz - Reset\n"); + } + printk_debug("Looking for bad Hot Swap Enable\n"); + dev = dev_find_slot(1, PCI_DEVFN(0x01,0)); + data = pci_read_config32(dev, 0x48); + if(data & 0x0c) { + reset=1; + printk_debug("Bad Hot Swap start - Reset\n"); + } + if(reset) { + /* enable cf9 */ + dev = dev_find_slot(node_link_to_bus(0, 0), PCI_DEVFN(0x04,3)); + pci_write_config8(dev, 0x41, 0xf1); + /* reset */ + dev = dev_find_slot(0, PCI_DEVFN(0x18,0)); + htic = pci_read_config32(dev, HT_INIT_CONTROL); + htic &= ~HTIC_BIOSR_Detect; + pci_write_config32(dev, HT_INIT_CONTROL, htic); + outb(0x0e, 0x0cf9); + } + else { + printk_debug("OK 133MHz & Hot Swap is off\n"); + } +} + unsigned long write_smp_table(unsigned long addr) { void *v; + reboot_if_hotswap(); + v = smp_write_floating_table(addr); return (unsigned long)smp_write_config_table(v); }
use max_lapicid() + 1 as apicid_base is not good. esp for apic id lifting. for 8 way dual core system, max_lapicid() will be 0x0f with lifting, and with lifting it will be 0x1f. YH
On 9/2/05, jason schildt jschildt@lnxi.com wrote:
DESCRIPTION:
## lnxi-patch-14 ##
src/mainboard/arima/hdama/mptable.c Removed: max_apicid() renamed it to max_lapicid() and moved it into generic code /cpu/x86/lapic/lapic.c (See next)
src/cpu/x86/lapic/lapic.c Added: generic max_lapicid() to replace get_apicid_base()
src/mainboard/.../mptable.c Replaced: get_apicid_base() with max_lapicid() tyan/s2850/mptable.c tyan/s2881/mptable.c tyan/s2882/mptable.c tyan/s2891/mptable.c tyan/s4880/mptable.c tyan/s2892/mptable.c tyan/s2875/mptable.c tyan/s4882/mptable.c tyan/s2885/mptable.c tyan/s2895/mptable.c
DIFFSTAT:
../cpu/x86/lapic/lapic.c | 24 +++++ arima/hdama/mptable.c | 198 ++++++++++++++++++++++++++++++++++++----------- tyan/s2850/mptable.c | 6 - tyan/s2875/mptable.c | 6 - tyan/s2881/mptable.c | 6 - tyan/s2882/mptable.c | 6 - tyan/s2885/mptable.c | 7 - tyan/s2891/mptable.c | 6 - tyan/s2892/mptable.c | 6 - tyan/s2895/mptable.c | 6 - tyan/s4880/mptable.c | 6 - tyan/s4882/mptable.c | 2 12 files changed, 187 insertions(+), 92 deletions(-)
PATCH:
Index: tyan/s2850/mptable.c
--- tyan/s2850/mptable.c (revision 1105) +++ tyan/s2850/mptable.c (working copy) @@ -107,11 +107,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(1);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0;
smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); Index: tyan/s2875/mptable.c =================================================================== --- tyan/s2875/mptable.c (revision 1105) +++ tyan/s2875/mptable.c (working copy) @@ -123,11 +123,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(1);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0; smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
Index: tyan/s2881/mptable.c
--- tyan/s2881/mptable.c (revision 1105) +++ tyan/s2881/mptable.c (working copy) @@ -136,11 +136,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2882/mptable.c =================================================================== --- tyan/s2882/mptable.c (revision 1105) +++ tyan/s2882/mptable.c (working copy) @@ -134,11 +134,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2885/mptable.c =================================================================== --- tyan/s2885/mptable.c (revision 1105) +++ tyan/s2885/mptable.c (working copy) @@ -158,14 +158,11 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2;
smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111 { device_t dev; Index: tyan/s2891/mptable.c =================================================================== --- tyan/s2891/mptable.c (revision 1105) +++ tyan/s2891/mptable.c (working copy) @@ -204,11 +204,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2892/mptable.c =================================================================== --- tyan/s2892/mptable.c (revision 1105) +++ tyan/s2892/mptable.c (working copy) @@ -204,11 +204,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s2895/mptable.c =================================================================== --- tyan/s2895/mptable.c (revision 1105) +++ tyan/s2895/mptable.c (working copy) @@ -284,11 +284,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(4);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_ck804 = apicid_base; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s4880/mptable.c =================================================================== --- tyan/s4880/mptable.c (revision 1105) +++ tyan/s4880/mptable.c (working copy) @@ -135,11 +135,7 @@
/*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base+0; apicid_8131_1 = apicid_base+1; apicid_8131_2 = apicid_base+2; Index: tyan/s4882/mptable.c =================================================================== --- tyan/s4882/mptable.c (revision 1105) +++ tyan/s4882/mptable.c (working copy) @@ -94,7 +94,7 @@
/*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
- apicid_base = max_lapicid() + 1;
#else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; #endif Index: ../cpu/x86/lapic/lapic.c =================================================================== --- ../cpu/x86/lapic/lapic.c (revision 1105) +++ ../cpu/x86/lapic/lapic.c (working copy) @@ -3,6 +3,8 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h>
+#include <arch/cpu.h>
void setup_lapic(void) { /* this is so interrupts work. This is very limited scope -- @@ -70,3 +72,25 @@ printk_info("done.\n"); post_code(0x9b); }
+unsigned max_lapicid(void) +{
- /* Walk through the device tree and find the
- maximum local apic id.
- We use this when assigning apic ids to the
- IOAPICs.
- */
- unsigned max_lapicid;
- device_t dev;
- max_lapicid = 0;
- for(dev = all_devices; dev; dev = dev->next) {
- if (dev->path.type != DEVICE_PATH_APIC)
- continue;
- if (dev->path.u.apic.apic_id > max_lapicid) {
- max_lapicid = dev->path.u.apic.apic_id;
- }
- }
- return max_lapicid;
+}
Index: arima/hdama/mptable.c
--- arima/hdama/mptable.c (revision 1105) +++ arima/hdama/mptable.c (working copy) @@ -3,7 +3,61 @@ #include <device/pci.h> #include <string.h> #include <stdint.h> +#include <cpu/x86/lapic.h> +#include <arch/cpu.h> +#include <arch/io.h>
+#define HT_INIT_CONTROL 0x6c +#define HTIC_BIOSR_Detect (1<<5)
+/* If we assume a symmetric processor configuration we can
- get all of the information we need to write the processor
- entry from the bootstrap processor.
- Plus I don't think linux really even cares.
- Having the proper apicid's in the table so the non-bootstrap
- processors can be woken up should be enough.
- */
+void smp_write_processors_inorder(struct mp_config_table *mc) +{
- int boot_apic_id;
- int order_id;
- unsigned apic_version;
- unsigned cpu_features;
- unsigned cpu_feature_flags;
- struct cpuid_result result;
- device_t cpu;
- boot_apic_id = lapicid();
- apic_version = lapic_read(LAPIC_LVR) & 0xff;
- result = cpuid(1);
- cpu_features = result.eax;
- cpu_feature_flags = result.edx;
- /* order the output of the cpus to fix a bug in kernel 6 11 */
- for(order_id = 0;order_id <256; order_id++) {
- for(cpu = all_devices; cpu; cpu = cpu->next) {
- unsigned long cpu_flag;
- if ((cpu->path.type != DEVICE_PATH_APIC) ||
- (cpu->bus->dev->path.type !=
DEVICE_PATH_APIC_CLUSTER))
- {
- continue;
- }
- if (!cpu->enabled) {
- continue;
- }
- cpu_flag = MPC_CPU_ENABLED;
- if (boot_apic_id == cpu->path.u.apic.apic_id) {
- cpu_flag = MPC_CPU_ENABLED |
MPC_CPU_BOOTPROCESSOR;
- }
- if(cpu->path.u.apic.apic_id == order_id) {
- smp_write_processor(mc,
- cpu->path.u.apic.apic_id, apic_version,
- cpu_flag, cpu_features, cpu_feature_flags);
- break;
- }
- }
- }
+}
static unsigned node_link_to_bus(unsigned node, unsigned link) { device_t dev; @@ -50,6 +104,10 @@ unsigned char bus_8131_1; unsigned char bus_8131_2; unsigned char bus_8111_1;
- unsigned apicid_base;
- unsigned apicid_8111;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); memset(mc, 0, sizeof(*mc)); @@ -68,8 +126,12 @@ mc->mpe_checksum = 0; mc->reserved = 0;
- smp_write_processors(mc);
smp_write_processors_inorder(mc);
apicid_base = max_lapicid() + 1;
apicid_8111 = apicid_base;
apicid_8131_1 = apicid_base + 1;
apicid_8131_2 = apicid_base + 2;
{ device_t dev;
@@ -124,7 +186,7 @@ smp_write_bus(mc, bus_isa, "ISA ");
/* IOAPIC handling */
- smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
- smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
{ device_t dev; struct resource *res; @@ -133,7 +195,7 @@ if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
} } /* 8131 apic 4 */ @@ -141,44 +203,44 @@ if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
} } }
/* ISA backward compatibility interrupts */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x00, 0x02, 0x00);
- bus_isa, 0x00, apicid_8111, 0x00);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x01, 0x02, 0x01);
- bus_isa, 0x01, apicid_8111, 0x01);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x00, 0x02, 0x02);
- bus_isa, 0x00, apicid_8111, 0x02);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x03, 0x02, 0x03);
- bus_isa, 0x03, apicid_8111, 0x03);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x04, 0x02, 0x04);
- bus_isa, 0x04, apicid_8111, 0x04);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x05, 0x02, 0x05);
- bus_isa, 0x05, apicid_8111, 0x05);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x06, 0x02, 0x06);
- bus_isa, 0x06, apicid_8111, 0x06);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x07, 0x02, 0x07);
- bus_isa, 0x07, apicid_8111, 0x07);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x08, 0x02, 0x08);
- bus_isa, 0x08, apicid_8111, 0x08);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x09, 0x02, 0x09);
- bus_isa, 0x09, apicid_8111, 0x09);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0a, 0x02, 0x0a);
- bus_isa, 0x0a, apicid_8111, 0x0a);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0b, 0x02, 0x0b);
- bus_isa, 0x0b, apicid_8111, 0x0b);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0c, 0x02, 0x0c);
- bus_isa, 0x0c, apicid_8111, 0x0c);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0d, 0x02, 0x0d);
- bus_isa, 0x0d, apicid_8111, 0x0d);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0e, 0x02, 0x0e);
- bus_isa, 0x0e, apicid_8111, 0x0e);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
- bus_isa, 0x0f, 0x02, 0x0f);
- bus_isa, 0x0f, apicid_8111, 0x0f);
/* Standard local interrupt assignments */ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, @@ -188,46 +250,48 @@
/* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */ /* On board nics */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, apicid_8111, 0x13);
- /* On board SATA */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x05<<2)|0, apicid_8111, 0x11);
/* PCI Slot 1 */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, apicid_8111, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, apicid_8111, 0x10);
/* PCI Slot 2 */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, apicid_8111, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, apicid_8111, 0x11);
/* PCI Slot 3 */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, apicid_8111, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, apicid_8111, 0x10);
/* PCI Slot 4 */
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, apicid_8111, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, apicid_8111, 0x11);
/* PCI Slot 5 */ #warning "FIXME get the irqs right, it's just hacked to work for now"
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, apicid_8111, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, apicid_8111, 0x10);
/* PCI Slot 6 */ #warning "FIXME get the irqs right, it's just hacked to work for now"
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, apicid_8111, 0x10);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, apicid_8111, 0x11);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, apicid_8111, 0x12);
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, apicid_8111, 0x13);
/* There is no extension information... */
@@ -239,9 +303,51 @@ return smp_next_mpe_entry(mc); }
+void reboot_if_hotswap(void) +{
- /* Hack patch work around for hot swap enable 33mhz problem */
- device_t dev;
- uint32_t data;
- unsigned long htic;
- int reset;
- int i;
- reset = 0;
- printk_debug("Looking for bad PCIX MHz input\n");
- dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
- data = pci_read_config32(dev, 0xa0);
- if(!(((data>>16)&0x03)==0x03)) {
- reset=1;
- printk_debug("Bad PCIX MHz - Reset\n");
- }
- printk_debug("Looking for bad Hot Swap Enable\n");
- dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
- data = pci_read_config32(dev, 0x48);
- if(data & 0x0c) {
- reset=1;
- printk_debug("Bad Hot Swap start - Reset\n");
- }
- if(reset) {
- /* enable cf9 */
- dev = dev_find_slot(node_link_to_bus(0, 0), PCI_DEVFN(0x04,3));
- pci_write_config8(dev, 0x41, 0xf1);
- /* reset */
- dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
- htic = pci_read_config32(dev, HT_INIT_CONTROL);
- htic &= ~HTIC_BIOSR_Detect;
- pci_write_config32(dev, HT_INIT_CONTROL, htic);
- outb(0x0e, 0x0cf9);
- }
- else {
- printk_debug("OK 133MHz & Hot Swap is off\n");
- }
+}
unsigned long write_smp_table(unsigned long addr) { void *v;
- reboot_if_hotswap();
v = smp_write_floating_table(addr); return (unsigned long)smp_write_config_table(v); }
-- Jason W. Schildt LinuxBIOS Software Engineer Linux Networx
-- LinuxBIOS mailing list LinuxBIOS@openbios.org http://www.openbios.org/mailman/listinfo/linuxbios
yhlu yinghailu@gmail.com writes:
use max_lapicid() + 1 as apicid_base is not good.
esp for apic id lifting.
for 8 way dual core system, max_lapicid() will be 0x0f with lifting, and with lifting it will be 0x1f.
The x86 standard is now is tuples of (nodeid, coreid) which means on k8 based systems the cpu apicids will always be densly packed. I haven't seen the reference but I have been assured that is the way things are working. I believe it was Richard Breuner assured me of this
In addition in the code cleanups that have been us only use the (nodeid, coreid) as supporting multiple form simultaneously is both confusing, and creates code that is hard to maintain.
Eric
-
ebiederman＠lnxi.com -
jason schildt -
yhlu