For 1) Please don't do that on amd8131_800Mhz.
Also I suggest you need to check the CPU rev to decide if set to 1GMhz.
For 2) That bit only control x4 DIMM, So please don't do that on x8 or x16. All the Normal BIOS only compare that to 4 only, and AMD document only said x4 Only.
For 3) Should be OK.
YH
-----Original Message----- From: Stefan Reinauer [mailto:stepan@openbios.org] Sent: Wednesday, January 26, 2005 2:17 AM To: linuxbios@clustermatic.org Subject: Hypertransport Speed
Hi,
I would like to check the applied patch into LinuxBIOS CVS if nobody happens to disagree loudly:
hypertransport clocking
This patch allows to disable the speed cuts during hypertransport setup using cmos variables "amdk8_1GHz" and "amd8131_800MHz". I've tried them on hardware which worked perfectly fine with the higher speed links for both devices (K8 and 8131). Since it is disabled per default and needs cmos and compile time activation, it will not break anything.
Affected files: src/config/Options.lb src/devices/hypertransport.c src/northbridge/amd/amdk8/coherent_ht.c src/northbridge/amd/amdk8/incoherent_ht.c
ram init
This patch allows to use 8x (and probably 16x) dimms with LinuxBIOS on K8.
Affected files: src/northbridge/amd/amdk8/raminit.c
Debugging This patch will print the pci vendor/device id in
print_pci_devices() which makes determining the early bus structure a lot easier.
It also only prints the first 128 bytes of SPDROM during dump_spd_registers() since they are defined to be 128byte.
Affected files: src/northbridge/amd/amdk8/debug.c
Stefan
* YhLu YhLu@tyan.com [050126 18:50]:
For 2) That bit only control x4 DIMM, So please don't do that on x8 or x16. All the Normal BIOS only compare that to 4 only, and AMD document only said x4 Only.
At least one commercial bios vendor does this for x8 as well, and it is definitely needed on the system with x8 Rams that I have been porting to. I would not see any other possibility to get this system integrated in LinuxBIOS, since this type of RAM is what they use per default.
I would assume there were no x8 RAMs when this AMD document was written?
Stefan