[LinuxBIOS] Asus smbus mux

[koko]

I started a thread (well, its me talking to myself) "read the spd on
A7V133" on lm-sensors list. My conclusions:

E:\dane\Testery !\sandra>SPDINFO.EXE 1 a7v
Ctrl 0, SMBus, Sys, IO 0000e800h, Mem 00000000h, Drv Intel PIIX4 SMBus
/ compatible, Brd A7V
Mux 0 Asus IO mux, IO 0000e44dh, Ext 4267320

rasz@capek:~$ cat /proc/ioports|grep e4
e400-e47f : motherboard
 e400-e403 : ACPI PM1a_EVT_BLK
 e404-e405 : ACPI PM1a_CNT_BLK
 e408-e40b : ACPI PM_TMR
 e410-e415 : ACPI CPU throttle
 e420-e423 : ACPI GPE0_BLK

I decompiled ACPI DSDT from my bios and found this :

OperationRegion (\SGPO, SystemIO, 0xE44C, 0x04)
   Field (SGPO, ByteAcc, NoLock, Preserve)
   {
       GPO0,   1,
               Offset (0x01),
       GPO8,   1,
           ,   2,
       GP11,   1,
               Offset (0x04)
   }

so
1 Linux ACPI  - Bios ACPI mismatch,  0xE44C is not claimed and not
mapped properly
2 mux GPIO is mapped to 0xE44C-0xE44F.

We can reverse it by trial and error (or by talking to sandra/everest
developers, Im trying it now), or just use SPDINFO.EXE (its a part of
SiSoftware Sandra package) on board to board basis comparing data and
obtaining the right bit mask to switch smbus to SPD channel.

Im posting this because I saw some movement on VT82C686 front, and
this info will be needed to port to Asus boards (K7 ones hide SPD and
Clock chip).

[RusH]

On 4/1/07, koko  wrote:

rasz@capek:~$ sudo isadump -f 0xe440 16
0 1 2 3 4 5 6 7 8 9 a b c d e f
e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 ff f6 ff 0f
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX

bit 0 0xe44d
rasz@capek:~$ sudo isaset -y -f 0xe44d 0xf7
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: 50 51 52 XX XX XX XX XX XX XX XX XX XX XX XX XX

spd works :)
Big thanks to Tamas MIKLOS (Lavalys) and Franck@x86 (x86-secret)

Tamas MIKLOS send me the asus mux code. There are 5 hacks with smbus
mux switch on IO, and 3 with smbus mux switch on smbus (lol thats
funny), it covers 31 types of asus boards (plus many more subtypes).
Oldest board is P3B, newest P4B.

[Jean Delvare]

On Mon, 2 Apr 2007 02:22:54 +0200, RusH wrote:
> On 4/1/07, koko  wrote:
>
> rasz@capek:~$ sudo isadump -f 0xe440 16
> 0 1 2 3 4 5 6 7 8 9 a b c d e f
> e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 ff f6 ff 0f
> rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
> 50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX
>
> bit 0 0xe44d
> rasz@capek:~$ sudo isaset -y -f 0xe44d 0xf7
> rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
> 50: 50 51 52 XX XX XX XX XX XX XX XX XX XX XX XX XX
>
> spd works :)
> Big thanks to Tamas MIKLOS (Lavalys) and Franck@x86 (x86-secret)
>
> Tamas MIKLOS send me the asus mux code. There are 5 hacks with smbus
> mux switch on IO, and 3 with smbus mux switch on smbus (lol thats
> funny), it covers 31 types of asus boards (plus many more subtypes).
> Oldest board is P3B, newest P4B.

Is this information public? We don't yet support I2C/SMBus
multiplexing, but when we do, if we have the information, we can add
support for these boards.

[RusH]

On 4/2/07, Jean Delvare  wrote:
> > Tamas MIKLOS send me the asus mux code. There are 5 hacks with smbus
> > mux switch on IO, and 3 with smbus mux switch on smbus (lol thats
> > funny), it covers 31 types of asus boards (plus many more subtypes).
> > Oldest board is P3B, newest P4B.
>
> Is this information public? We don't yet support I2C/SMBus
> multiplexing, but when we do, if we have the information, we can add
> support for these boards.

Here it is, pseudocode:

ulong temp, temp2;

'3V4X'

enable SPD
    temp = inl_port($e44c);
    outl_port ($e44c,(temp & 0xe7ffffff) | 0x08000000);

disable SPD
    outl_port($e44c,temp);

----------------------

'K7V'
'A7V'
'A7V133'
'A7P'
'A7M'

enable SPD
    temp = inb_port($e44d);
    outb_port ($e44d,temp | 0x01);

disable SPD
    outb_port($e44d,temp);

This one is tested on A7V133, from DSTD
  OperationRegion (\SGPO, SystemIO, 0xE44C, 0x04)
  Field (SGPO, ByteAcc, NoLock, Preserve)
  {
      GPO0,   1,
              Offset (0x01),
      GPO8,   1, fe
          ,   2,
      GP11,   1,
              Offset (0x04)
  }

tested
1 1 1 1 0 0 0 0 GPO0
1 0 0 1 1 0 0 1 GPO8
0 1 0 1 1 0 1 0 GP11
s c n n n n c s

s=spd + hwmonitor
c=clock + hwmonitor
n=hwmonitor
----------------------

'P3B'
'CUBX'

enable SPD
    temp = inb_port($e437);
    outb_port($e437,(temp & 0xe7) | 0x08);

disable SPD
    outb_port($e437,temp);

----------------------

'CUPL'
'UV4X'

enable SPD
    temp = inl_port($e44c);
    outl_port($e44c,(temp & 0xfffff6fff) | 0x100);

disable SPD
    outl_port($e44c,temp);

----------------------

'USL2'
'CUC2'
'-A7V266-E'
'-A7V266-M'
'-A7V266'
'WEM'
'-CUW'
'<<CUW>>'
'P3C'
'UEP2'
'TUEG'
'-MEW-'
'<<MEW>>'
'-P3W-E'
'<<P3W>>'
'CUSI'
'CUV2'
'A7S'

enable SPD
         outb_port($2e,$87);
         outb_port($2e,$87);
         outb_port($2e,7);
         outb_port($2f,8);
         outb_port($2e,$f1);
         temp = inb_port($2f);
         outb_port($2e,$f1);
         outb_port($2f,(temp & 0xe7) | 0x10);
         outb_port($2e,$aa);

disable SPD
         outb_port($2e,$87);
         outb_port($2e,$87);
         outb_port($2e,7);
         outb_port($2f,8);
         outb_port($2e,$f1);
         outb_port($2f,temp);
         outb_port($2e,$aa);

----------------------

'CUR'

enable SPD
         temp = inb_port($ec80);
         outb_port($ec80,(temp & 0xef) | 0x10);
         temp2 = inb_port($ec84);
         outb_port($ec84,(temp2 & 0xef) | 0x10);

disable SPD
         outb_port($ec80,temp);
         outb_port($ec84,temp2);

----------------------

'A7V333'

enable SPD
         outb_port($2E,$87);
         outb_port($2E,$87);
         outb_port($2E,7);
         outb_port($2F,8);
         outb_port($2E,$F0);
         temp = inb_port($2F);
         outb_port($2E,$F0);
         outb_port($2F,(temp & 0xE7) | 0x10);
         outb_port($2E,$F1);
         temp2 = inb_port($2F);
         outb_port($2E,$F1);
         outb_port($2F,(temp2 & 0xE7) | 0x10);
         outb_port($2E,$AA);

disable SPD
         outb_port($2E,$87);
         outb_port($2E,$87);
         outb_port($2E,7);
         outb_port($2F,8);
         outb_port($2E,$F0);
         outb_port($2F,temp);
         outb_port($2E,$F1);
         outb_port($2F,temp2);
         outb_port($2E,$AA);

----------------------

'<P4B>'

enable SPD
         outb_port($2E,$87);
         outb_port($2E,$87);
         outb_port($2E,7);
         outb_port($2F,7);
         outb_port($2E,$F2);
         temp = inb_port($2F);
         outb_port($2E,$F2);
         outb_port($2F,(temp & 0xFC) | 0x1);
         outb_port($2E,2);
         temp2 = inb_port($2F);
         outb_port($2F,temp2 | 0x2);
         outb_port($2E,$AA);

disable SPD
         outb_port($2E,$87);
         outb_port($2E,$87);
         outb_port($2E,7);
         outb_port($2F,7);
         outb_port($2E,$F2);
         outb_port($2F,temp);
         outb_port($2E,$AA);

----------------------

[Jean Delvare]

On Wed, 4 Apr 2007 04:25:10 +0200, RusH wrote:
> > Is this information public? We don't yet support I2C/SMBus
> > multiplexing, but when we do, if we have the information, we can add
> > support for these boards.
>
> Here it is, pseudocode:
>
> ulong temp, temp2;
>
> '3V4X'
>
> enable SPD
>    temp = inl_port($e44c);
>    outl_port ($e44c,(temp & 0xe7ffffff) | 0x08000000);
>
> disable SPD
>    outl_port($e44c,temp);
>
> 'K7V'
> 'A7V'
> 'A7V133'
> 'A7P'
> 'A7M'
>
> enable SPD
>    temp = inb_port($e44d);
>    outb_port ($e44d,temp | 0x01);
>
> disable SPD
>    outb_port($e44d,temp);
>
> This one is tested on A7V133, from DSTD
>   OperationRegion (\SGPO, SystemIO, 0xE44C, 0x04)
>   Field (SGPO, ByteAcc, NoLock, Preserve)
>   {
>       GPO0,   1,
>               Offset (0x01),
>       GPO8,   1, fe
>           ,   2,
>       GP11,   1,
>               Offset (0x04)
>   }
>
> tested
> 1 1 1 1 0 0 0 0 GPO0
> 1 0 0 1 1 0 0 1 GPO8
> 0 1 0 1 1 0 1 0 GP11
> s c n n n n c s
>
> s=spd + hwmonitor
> c=clock + hwmonitor
> n=hwmonitor
>
> 'P3B'
> 'CUBX'
>
> enable SPD
>    temp = inb_port($e437);
>    outb_port($e437,(temp & 0xe7) | 0x08);
>
> disable SPD
>    outb_port($e437,temp);
>
> 'CUPL'
> 'UV4X'
>
> enable SPD
>    temp = inl_port($e44c);
>    outl_port($e44c,(temp & 0xfffff6fff) | 0x100);
>
> disable SPD
>    outl_port($e44c,temp);
>
> 'USL2'
> 'CUC2'
> '-A7V266-E'
> '-A7V266-M'
> '-A7V266'
> 'WEM'
> '-CUW'
> '<<CUW>>'
> 'P3C'
> 'UEP2'
> 'TUEG'
> '-MEW-'
> '<<MEW>>'
> '-P3W-E'
> '<<P3W>>'
> 'CUSI'
> 'CUV2'
> 'A7S'
>
> enable SPD
>          outb_port($2e,$87);
>          outb_port($2e,$87);
>          outb_port($2e,7);
>          outb_port($2f,8);
>          outb_port($2e,$f1);
>          temp = inb_port($2f);
>          outb_port($2e,$f1);
>          outb_port($2f,(temp & 0xe7) | 0x10);
>          outb_port($2e,$aa);
>
> disable SPD
>          outb_port($2e,$87);
>          outb_port($2e,$87);
>          outb_port($2e,7);
>          outb_port($2f,8);
>          outb_port($2e,$f1);
>          outb_port($2f,temp);
>          outb_port($2e,$aa);
>
> 'CUR'
>
> enable SPD
>          temp = inb_port($ec80);
>          outb_port($ec80,(temp & 0xef) | 0x10);
>          temp2 = inb_port($ec84);
>          outb_port($ec84,(temp2 & 0xef) | 0x10);
>
> disable SPD
>          outb_port($ec80,temp);
>          outb_port($ec84,temp2);
>
> 'A7V333'
>
> enable SPD
>          outb_port($2E,$87);
>          outb_port($2E,$87);
>          outb_port($2E,7);
>          outb_port($2F,8);
>          outb_port($2E,$F0);
>          temp = inb_port($2F);
>          outb_port($2E,$F0);
>          outb_port($2F,(temp & 0xE7) | 0x10);
>          outb_port($2E,$F1);
>          temp2 = inb_port($2F);
>          outb_port($2E,$F1);
>          outb_port($2F,(temp2 & 0xE7) | 0x10);
>          outb_port($2E,$AA);
>
> disable SPD
>          outb_port($2E,$87);
>          outb_port($2E,$87);
>          outb_port($2E,7);
>          outb_port($2F,8);
>          outb_port($2E,$F0);
>          outb_port($2F,temp);
>          outb_port($2E,$F1);
>          outb_port($2F,temp2);
>          outb_port($2E,$AA);
>
> '<P4B>'
>
> enable SPD
>          outb_port($2E,$87);
>          outb_port($2E,$87);
>          outb_port($2E,7);
>          outb_port($2F,7);
>          outb_port($2E,$F2);
>          temp = inb_port($2F);
>          outb_port($2E,$F2);
>          outb_port($2F,(temp & 0xFC) | 0x1);
>          outb_port($2E,2);
>          temp2 = inb_port($2F);
>          outb_port($2F,temp2 | 0x2);
>          outb_port($2E,$AA);
>
> disable SPD
>          outb_port($2E,$87);
>          outb_port($2E,$87);
>          outb_port($2E,7);
>          outb_port($2F,7);
>          outb_port($2E,$F2);
>          outb_port($2F,temp);
>          outb_port($2E,$AA);

Thanks for the information. I really wonder why Asus tries that hard to
hide some I2C/SMBus devices behind gates. I fail to see any benefit in
doing so, and it makes both the hardware more expensive and the code
more complex.